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BIT BUFFER INSTRUCTIONS
Mnemonic
Operand
Word Times
Register Transfer
R,
TRA
FROM, TO
The bit contained in the receive buffer is
transferred to position 18 of R; the receive
buffer and flag are reset.
Register Transfer
,T
TRA
SCN
SCAN
DEF
NES
DEF
1.
DEF 2.
DEF 3.
DEF 4.
DEF 5.
DEF 6-10.
NES 1.
NES 2.
NES 3-4.
NES 5.
NES 6.
NES 7-10.
FROM, TO
I
I
The low order bit of the Z drivers is trans-
ferred to the transmit data buffer. The transmit
flag is reset.
1+3N
Scan the bit buffer units.
The bit buffers
are interrogated for data received or to be
transmitted.
Data is moved to and from
the bit buffers.
1
Reset receive flag and receive data buffer.
Reset transmit flag and data buffer.
Set receive mode turn carrier off.
Set transmit mode turn carrier on.
Reset receive clock.
Not used.
I
Receive flag set (data buffer contains a new bit).
Transmit flag set (data buffer is ready for a new bit).
Not used.
Interlock on.
Carrier on.
Not used.
1
[IDruu&~~uc:J ~@------------
V-8
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