GE DATANET-30 Programming Reference Manual page 121

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in the inner tracks and continue in the outer tracks. As frames are being transferred, a count
is maintained in the DSU controller, so that the read or write operation continues for the specified
number of frames.
As already explained, the sequential incrementing of the frame address
in the controller automatically results in the proper head switching. Because frame 95 is the
highest valid address, incrementing the address in the controller beyond 95 causes frame 0
to be the next frame transferred.
Bit 1 of word 3 is identified by read next frame. When this bit is on (contains a 1) the seven
bits of the frame address are ignored and the subsequent reading or writing operation takes
place in the next frame.
Bit 1 of command word 3 is used when it is desired to sample a frame
from any given position of the positioning arm.
Rather than search for a specific frame out
of the 96 possible, the next frame can be read. This form of addressing can also be used when
it is known that every frame in a track is to be transferred and it does not make any difference
which is read first.
READ/WRITE COMMAND WORDS
After a DSU arm has been positioned the DSU can then be addressed for a read or write operation.
It
is first necessary to store the three command words for the read/write operation in memory
locations 3, 4, and 5. An SEL instruction executes the read or write.
The command word format for read or write operations is as follows:
18
17
11
10
9
8
7
6
5
4
3
2
1
Command Word 1
~~~Number
Not Used
Not Used
Read
11 Write
15
14
13
9
8
7
6
5
4
3
2
1
Command Word 2
No. of Frames
1 Remove power
Disc File Number
0
Hold power
010 Read
111 Write
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Command Word 3
\
J
l
J
y
lo
Starting Location
in Memory
[ID&1J&~~1J~ ~@------------
V-40

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