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output
f
req uency is phase locked to the 1 kH z reference
signal .
3-12 .3
Ρ
R Π G ΗΑΛ1Λ1 λΓ, L Γ ΓιΙιf Ι D Γ R
In order for t h e Μ 31 Α to pe r form
p
ro p erly . t he divi der is
designed to
d
ivide the
V
CO freque ncy by (10,000 -Sk i
where Sk is the number set on
t
he "kHz" switch es . The
d
ivider counts the number of cycles at its input and puts
out α pu lse when
t
he r οιιιιι
r
eaches 10,000 . T he starting
count is the nu mber s h own on the '"kHz" switches . For
examp le, if the instrument is set for 222 .500 M117 t this
Circuit Would divi de
b
y 9,500 Ιεουητ from 600 to 10,000) .
Therefore, the variable input to t he phase
d
etector would
be correct 11 kH zl only it the
V
CO output were 9,500
ΜΗτ .
3 .12.4
UNLOC K
I
N DICATO R
Wh en
t
h
e phase-locked loop is unlocked, the LED on trip
of the mo
d
ule will light and the front panel ACCURACY
ligh ts will
f
lash ,
Α window detector man lots the voltage level which is
being fe d from the phase detector to t he VCO. If the
voltage exceeds the ηποηαΙ υμ eratiιι g ιαηgti, μυωeι is
app lied to the module light and the flas h er circuit on the
M
odulatio n Board.
3,13 Μ 32 Α -- MHz ST EP S
The Μ 32 Α
provides, lot ι hε Μ 34, α reference Γregηeηιγ
which εοιrπτρνη
d
τ to the setting on t he '*MHz" switc hes
Isee Fig ur e 3-18), Th e Μ32 Α output
r
ange is 1448 to 1487
MHz,
w
hic h repeats itself wit h every 40 MHz change of the
"MHz" switc h setting . Any sμεε ifir. Μ37Α output
rVIATPS to
the "MH z" s
w
itch sell nit (See) by
t
h e ρgιιατίοιι ( Ου tΡια =
(1448 +
R)
MHz),
w
h
e
r
e
R ίτ
t
he
R
emai nd er ο 1 divi d i ng S
m
by 40 . If
t
he front pa nel
L
ever/Indicator switches are set,
for exam p le, to 333 .000, R would
b
e 13 (333 : 40 = Β with
α
R
emainder of 13), The output of the Λ 432Α would
t
h en
b
e 1448 + 13 = 1461 MHz
.
3.13.1
VCO
T
he output of t h e Μ32 Α is produced by α voltage
controlled oscillator . Th is VCO is coarsely turned by the
repeating
a
nalog Output
o
f tho M 172 . Fine tuning is
t
h e
result of including the
V
CO in α phase-tcleked loop, In
addition to the
V
CO, the phase locked loop includes a
ph ase
d
etector and ριοη r αmm α ble divider,
3 .13 .2
PROGRAMMABLE DIVIDER
Α sample of the VCO output is
m
ixe d wit h
t
he 1440 MH z
signal fr om t h e Crystal
R
eference
p
ro du ci ng α
d
iffe rence
f reque ncy ο1 from 8 to 47 MHz, which is t hen shaped into
TT L pulses and
a
pp lie d to the programmable divi der .
3-16
T
h e divider counts the falling edges of t h e 8-47 MH? input
ριι1χe", reselling eac h time α Count of 47 is reac h ed. The
ι e> αΙ μιιΙςι , is applied to one input of
t
he ph ase
d
etectoι
By ι :υηι r πιΙίη ; the, 5ία r !ίη g count υ1 the ρrυ(ραιτιπιαΙιΙ-
ιΙινιιΙι "ι , 1 Ιυ " π 11"εονe dίνί5υι call beconpollvd.
fire starting count of t he ριο gr απιπια b Ι e
d
ivider is selected
by α ι ~ υd only ηπ e π >o ry, whic h is
p
rogra mm ed to provide
the correct "R" ntormation far each "Sm" setting. This
"R " " ι, th en applied [π
t
he program
m
able
d
ivi
d
er as the
starting count- Thu s, as th e star ting count varies from 0 [ο
39 . t he effective
d
iv ί soi varies from 47 to 8.
W
hen t he
V
CO is ru nn ing at the correct frequ ency, the
programmable divi der reset pu lse rate will be I
MHz .
3.13.3
PHAS E DETE CTO R
One ίηρυι in the phase detector is
t
he reset
p
ulse from t he
p
rogram mable divider, T he ot h er input is α 1 MI-Ii f,xed
ια 1, ινιίη τιιςη:ιΙ fro
m
t
h
r-
Cry τ lal
R
Orre ιιεe, The μΙι;ιτο
ιΙηιυηιυ , ιιηηαι 1 ί % a voltage detπιιηιηεd by Ι fιπ
d
ίΓΓιιre ηcιι Ιι
ph ase α1
t
he phase detector inputs, and is used to cancel
any error in t h e VCO frequ ency or phase.
If
τ
hπ
V
CO συΓΡιιι [rerλυ en εy is too
h
ig h, for e χαιιιρΙe . , the
phase detecto,
o
u tpu t beco mes Man?
n
egative, τhιι $
ι ncrεasing th e VCO varact σr diode tuning capacitance and
1οωεr ίπ q th e
V
ςΠ freque ncy, Ι 1
t
he VCO frequency is too
low, the ι ev εrse occurs . Τhυτ , th e loop will ten
d
[ο main
ιαίπ ι ero
p
h
ase or frequency eιιιι r, Α voltage-controlle d
attenuar ηr betwee n t he phase detector circuit and Ilip
VC Π keeps the . open loop rider) of the phase locked loop
relatively constant over the programmed frequ ency range,
allow-ημ th e loop noise to
b
e minimize d.
3.13.4
UNL OC KE D I N DICATO R
When the phase-locked loop is unlocked . the LED on top
of the module will light and the front-panel ACCURACY
lights will
f
lash .
λ ω,ηεΙπιν ι1π!ΟCΙπι monitors t h e voltage level being Υ erl
Ιrοπι the phase
d
etector to t he
V
CO . Ι !
t
h e voltage exceeds
Ow normal σρειατιηg range,
p
ower is applied to t h e module
tight α ">d t he flas her circu it on the Modulation Board .
3.14 Μ33-2 -
N
ARR O
W
OSCI LL ATO R L OC K
T
he Μ33-2 contains
t
he circ uits to phase loc k
t
he
N
ar r ow
0srola rnr in the N19W (FILL 31 an d
t
h e M29.2 FM
R
eference (FIL L 51 . As explaine d in Section 3.2 .2. FIL L 5
ρ rιινίλp . s the reference frequency for FI L L 3.
3 .14 .1
PHAS E D ETE CTO R FO R FI LL 3
This εω ιιη compares t h e re f erence frequ enc
y
to the
variable 4ίe ηυ cιtεγ which re presents t h e
M
9W
V
CO output,
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