Intel E810-CQDA2T User Manual

Ethernet network adapter
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Intel
Ethernet Network Adapter
E810-CQDA2T
User Guide
Ethernet Products Group (EPG)
October 2023
Revision 1.1
722960-002

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Summary of Contents for Intel E810-CQDA2T

  • Page 1 ® Intel Ethernet Network Adapter E810-CQDA2T User Guide Ethernet Products Group (EPG) October 2023 Revision 1.1 722960-002...
  • Page 2 Section 5.6.3, “ITU G.8264 ESMC Messaging Using synce4l”. • Added Section 5.6.4, “Two E810-CQDA2T Adapter Configuration without GNSS”. • Added Section 5.6.5, “Two E810-CQDA2T Adapter Configuration without GNSS and with 1PPS”. • Added Section 5.6.6, “Two E810-CQDA2T Adapters with GNSS Connection Setup”.
  • Page 3: Table Of Contents

    Software Support/Packages ...................... 13 Building a linuxptp Project ......................16 Related linuxptp Information ....................17 Building a synce4l Tool ......................17 Configuring the E810-CQDA2T Using the Linux Kernel Interface ......18 Introduction ........................... 18 DPLL Priority .......................... 19 External Connectors ........................ 20 Channel 1 Configurations ......................
  • Page 4 ITU G.8264 ESMC Messaging Using synce4l ................53 5.6.4 Two E810-CQDA2T Adapter Configuration without GNSS ............53 5.6.5 Two E810-CQDA2T Adapter Configuration without GNSS and with 1PPS........56 5.6.6 Two E810-CQDA2T Adapters with GNSS Connection Setup............59 O-RAN Configuration 1 ......................62 5.7.1...
  • Page 5: Introduction

    User Guide Introduction Although IEEE 1588 Precision Time Protocol (PTP) support has been part of Intel's controller product line for generations. Intel only recently began developing PTP-optimized Ethernet Network Adapter products. The adoption of PTP in Ethernet connections is growing rapidly. Although the leader use case being considered is the build-out of 5G infrastructure, other applications that exist in datacenters, point of presence, financial, industrial, and energy sectors.
  • Page 6 ® Intel Ethernet Network Adapter E810-CQDA2T User Guide • ITU-T G.8275.1 • ITU-T G.8275.2 Note: Linux PTP project information can be found at: http://linuxptp.sourceforge.net/ 722960-002...
  • Page 7: E810-Cqda2T Ethernet Network Adapter

    1PPS and 10 MHz signaling electrical requirements. • In addition to the dual SMA connectors, the E810-CQDA2T also includes two U.FL connectors for 1PPS, 10 MHz, and/or 25 MHz; one is output only and the other is input only. This enables hardware-level traceability for connections to motherboards that do not have room for external SMA connectors.
  • Page 8 GNSS module provides the 1pps signal without the need for an external GNSS appliance. An I interface provides a way to access the serial port data on the GNSS, including configuration options. Table 2 provides additional information on the E810-CQDA2T: Table 2. E810-CQDA2T Product Information...
  • Page 9: Architecture

    Intel Ethernet Network Adapter E810-CQDA2T User Guide Architecture The block diagram for the E810-CQDA2T is shown in Figure 1. The E810-CQDA2T provides two coaxial input/output SMA connectors, two U.FL connectors, and an optional GNSS input connector, as shown in Figure Full-height, Half-length PCIe Card u.FL...
  • Page 10 < 2.9 V > 3.6 V Current consumption 30 mA EMI immunity out-of-band 30 V/m Out-of-band rejection 40 dB Gain of active LNA at E810-CQDA2T SMB 17 dB 50 dB connector Active antenna noise figure < 4 dB Axial ratio 2 dB Phase center variation <...
  • Page 11: Synchronization Signaling

    User Guide Synchronization Signaling The E810-CQDA2T has two SMA connectors at the faceplate and two on-board U.FL connectors for 1588 high precision timing connectivity. Each SMA signal can be configured to be an input or an output. The U.FL1 connector, associated with SMA1, can be output-only. The U.FL2 connector, associated with SMA2, can be input-only.
  • Page 12: Connectivity And Interoperability

    • The E810-CQDA2T adapter can connect two PSM4 transceivers and provide a total of eight 10 GbE signals via an MPO breakout cable. The Intel PSM4 transceiver has gone through extensive Intel qualification and is certified for use with the E810-CQDA2T.
  • Page 13: Software, Firmware, And Drivers

    Operating System Scope for E810 Timing-Enhanced Adapters: The following table lists the operating system support for a given release starting with Release 26.8, which represents the first production release for the E810-CQDA2T. Software Release Version Operating System 27.1/ 27.5/...
  • Page 14 ® Intel Ethernet Network Adapter E810-CQDA2T User Guide ® Refer to the Intel Ethernet Controller E810 Feature Support Matrix for additional NVM and software driver details.: https://cdrdv2.intel.com/v1/dl/getContent/607252 NVM Update Tool: https://www.intel.com/content/www/us/en/download/19624/non-volatile-memory-nvm- update-utility-for-intel-ethernet-network-adapter-e810-series.html Always choose the latest. ® Note: To update the NVM, refer to the...
  • Page 15 Configures device with specified option. -location (Segment:Bus) Selects device with specified PCIe Address. All actions succeeded. b. To update, you must first find the E810-CQDA2T adapter. In this example, it is NIC 2 (in 2x100 Gbps mode). # ./epct64e -devices Ethernet Port Configuration Tool EPCT version: v1.38.03.06...
  • Page 16: Building A Linuxptp Project

    All actions succeeded. c. Check the current and available configuration: (active 2 x 1 x 100) #./epct64e -nic 2 -get Ethernet Port Configuration Tool EPCT version: v1.38.03.06 Copyright 2019 - 2022 Intel Corporation. Available Port Options: ========================================================================== Port Quad 0...
  • Page 17: Related Linuxptp Information

    ® Intel Ethernet Network Adapter E810-CQDA2T User Guide 4. To install the program and related man pages into /usr/local, run make install with root privileges. # make install This enables you to run the tools from any directory. 5. For more details related to installing linuxptp, go to: http://linuxptp.sourceforge.net/...
  • Page 18: Configuring The E810-Cqda2T Using The Linux Kernel Interface

    $5}' | head -n 1` Note: This alternate command can only be used if one E810-CQDA2T is running in your system. Otherwise, the script must be amended appropriately. Some scripts also use the PCI_SLOT. Users can easily set it up by running the following:...
  • Page 19: Dpll Priority

    A better solution is to use any other port for this functionality or to use a virtual function for DPDK. DPLL Priority The E810-CQDA2T automatically switches reference inputs according to the default DPLL priority list, as shown in Table...
  • Page 20: External Connectors

    External connector configuration is available only on the port that owns the PTP timer. By default, it is Port 0. The E810-CQDA2T has four connectors for external 1PPS signals: SMA1, SMA2, U.FL1, and U.FL2 • SMA connectors are bidirectional and U.FL are unidirectional.
  • Page 21: Channel 1 Configurations

    ® Intel Ethernet Network Adapter E810-CQDA2T User Guide Channel 1 Configurations 1. SMA1 as 1PPS input: # echo 1 1 > /sys/class/net/$ETH/device/ptp/ptp*/pins/SMA1 # dmesg [792194.583302] ice 0000:03:00.0: SMA1 RX [792194.583304] ice 0000:03:00.0: SMA2 <current_state> U.FL2 <current_state> 2. SMA1 as 1PPS output: # echo 2 1 >...
  • Page 22: Channel 2 Configurations

    ® Intel Ethernet Network Adapter E810-CQDA2T User Guide Channel 2 Configurations 1. SMA2 as 1PPS input: # echo 1 2 > /sys/class/net/$ETH/device/ptp/ptp*/pins/SMA2 # dmesg [27158.812512] ice 0000:03:00.0: SMA1 <current_state> U.FL1 <current_state> [27158.812519] ice 0000:03:00.0: SMA2 RX 2. SMA2 as 1PPS output: # echo 2 2 >...
  • Page 23: Recovered Clocks (G.8261 Synce Support)

    ® Intel Ethernet Network Adapter E810-CQDA2T User Guide Recovered Clocks (G.8261 SyncE Support) Recovered clocks can be configured using a special sysfs interface that is exposed by every port instance. Writing to a sysfs under a given port automatically enables a recovered clock from a given port that is valid for a current link speed.
  • Page 24 1 and functions 4-7 correspond to quad 0. The PHY lanes, that is the physical Tx and Rx differential pairs, on the E810-CQDA2T are connected to the quad 0 and quad 1 cages. See the following table:...
  • Page 25: External Timestamp Signals

    User Guide External Timestamp Signals The E810-CQDA2T can use external 1PPS signals filtered out by the DPLL as its own time reference. When the DPLL is synchronized to the GNSS module or an external 1PPS source, the ts2phc tool can be used to synchronize the time to the 1PPS signal.
  • Page 26: Reading Status Of The Dpll

    Configurations (1 and 3) or (2 and 3) can be enabled at the same time, but not (1, 2, and 3). Reading Status of the DPLL The E810-CQDA2T driver exposes a simple debugfs interface that enables monitoring of the on-board DPLL device state.
  • Page 27: Dpll Monitoring

    Intel representative. 4.10 DPLL Monitoring In the default configuration, the E810-CQDA2T driver enables monitoring of the DPLL events and reports state changes in the default system log (dmesg) with the WARN level independently for each of the DPLL units.
  • Page 28: Advanced Dpll Configuration

    4.11.1 pin_cfg User Readable Format The DPLL on the E810-CQDA2T offer some advanced configuration options. These options are not needed on regular applications and can cause problems. Please use these commands with extra care. The DPLL will go back to the default values after a power cycle of the adapter.
  • Page 29 ® Intel Ethernet Network Adapter E810-CQDA2T User Guide | pin| enabled| dpll| freq| esync| 156250000| 156250000| 156250000| In the “in” table. the pin numbers are referred from the DPLL Priority See Section 4.2, “DPLL Priority”. In the “out” table pin 0 is SMA1 pin 1 is SMA2, all the other values do not modify.
  • Page 30: Dpll__Ref_Pin/Dpll__State Machine Readable Interface

    ® Intel Ethernet Network Adapter E810-CQDA2T User Guide Set freq to 10 MHz on input pin 4: DPLL will lock only if 10 MHz signals arrive on SMA1 and it has been enabled for input. # echo "in pin 4 freq 10000000" > /sys/class/net/$ETH/device/pin_cfg Set freq to 10 MHz on output pin 1: SMA2 will drive 10 MHz signal with embedded 1PPS if it has been enabled for output.
  • Page 31: 1Pps Signals From E810 Device To Dpll

    4.12 1PPS Signals from E810 Device to DPLL The E810-CQDA2T implements two 1PPS signals coming out of the MAC (E810 device) to the DPLL. They serve as the frequency reference (CVL-SDP20) and as both phase and frequency reference (CVL- SDP22) signals.
  • Page 32 # echo -ne "\xb5\x62\x06\x8a\x09\x00\x00\x05\x00\x00\x05\x00\x53\x10\x00\x06\x83" > /dev/gnssX //Terminal 2 The E810-CQDA2T driver implements GNSS interfaces for receiving NMEA messages from the optional GNSS module. The interface can be found in /dev/gnssX, where X is the GNSS interface. If you have only one adapter installed, the GNSS interface number will always be /dev/gnss0.
  • Page 33: Gnss Advanced Features

    Furthermore, gpsd provides the command line tool ubxtool, which support all original configuration commands. The optional GNSS module inside the E810-CQDA2T uses u-Blox 9-series chip ZED-F9T-00B. Before you start yours first investigation, we suggest you study most popular questions at: https://gpsd.io/faq.html#willitwork...
  • Page 34 ® Intel Ethernet Network Adapter E810-CQDA2T User Guide 4. You might need to add additional repositories to get dependencies, based on the distribution you are using. For example, for Red Hat 8 use commands: # subscription-manager repos --enable codeready-builder-for-rhel-8-$(arch)-rpms # sudo dnf install https://dl.fedoraproject.org/pub/epel/epel-release-latest- 8.noarch.rpm...
  • Page 35 (1207.140 MHz) 1. B1I and B1C not to be enabled concurrently. • Leverage GPSD APIs to improve the E810-CQDA2T with the optional GNSS accuracy: — gpsctl • gpsctl can switch a dual-mode GPS between NMEA and vendor-binary modes. The gpsctl API needs the gosd.socket service daemon running.
  • Page 36: Gnss Receiver Configuration Layers In The E810-Xxvda4T

    Desktop environment, you can consider ubxtool as efficient CLI for local and remote access. • The default setting of the E810-CQDA2T configuration minimizes NMEA sentence message for better timing usage. Only “GNRMC” and “GNGGA” are needed for 5G timing usage. For better understanding of NMEA sentence focus and its purpose, refer to: https://w3.cs.jmu.edu/bernstdh/web/common/help/nmea-sentences.php...
  • Page 37: Perform Antenna Status Check New Location Setup

    • 7 - Default configuration The E810-CQDA2T uses Layer 0 (RAM) to read RAM configuration from the device, and Layer 1 (BBR) to save configuration to the RAM of the device. If layers are used incorrectly, the ubxtool command will fail with a UBX-ACK-NAK response.
  • Page 38: Enabling And Disabling Additional Constellations

    ® Intel Ethernet Network Adapter E810-CQDA2T User Guide 4.15.4 Enabling and Disabling Additional Constellations Before enabling survey-in functionality to achieve precise time information, it is beneficial to enable additional constellations. With more constellations enabled, the GNSS receiver can access more satellites, allowing better precision with good sky view.
  • Page 39: Check Survey-In Status

    ® Intel Ethernet Network Adapter E810-CQDA2T User Guide 4.15.6 Check Survey-In Status You can create a while-loop to track survey-in status before going to the next step. The following ubxtool command can be a major portion to get survey-in status/result (the last line, valid 1 active 0, indicates that survey-in is successful: #ubxtool -t -w 5 -P 29.20 -v 1 -p TIM-SVIN...
  • Page 40: Check Gnss Overall Configuration Performance

    ® Intel Ethernet Network Adapter E810-CQDA2T User Guide 4.15.9 Check GNSS Overall Configuration Performance You might want to check your antenna and GNSS receiver overall performance with the Time-to-First-Fix (TTFF) value. After a power-down (warm starts, hot starts), the GNSS device triggers a next TTFF value based on antenna setting (or skyview, etc.).
  • Page 41: Configuration Setup

    Ethernet Network Adapter E810-CQDA2T User Guide Configuration Setup The E810-CQDA2T provides two coaxial input-output SMA connectors, two unidirectional U.FL connectors and an optional GNSS input connector, as shown in the following two illustrations. u.FL 2 u.FL 1 Optional GNSS Module...
  • Page 42: Disable All Sma And U.fl Connections

    ® Intel Ethernet Network Adapter E810-CQDA2T User Guide Disable All SMA and U.FL Connections 1. Set interface device: # export ETH=`grep 000f /sys/class/net/*/device/subsystem_device | awk -F"/" '{print $5}' | head -n 1` 2. Disable U.FL2: # echo 0 2 > /sys/class/net/$ETH/device/ptp/ptp*/pins/U.FL2 3.
  • Page 43: Ptp Grand Leader (Gm) With Optional Gnss Module

    E810-CQDA2T U.FL1 U.FL2 Figure 5. External Connections: PTP Grand Leader with Optional GNSS Module GNSS Server E810-CQDA2T Gen4 x8 System Clock Generation Intel® Xeon® Scalable Processor Figure 6. External Connections: Single E810-CQDA2T Adapter Configuration with GNSS (and Breakout Cable) 722960-002...
  • Page 44: Software Configuration

    Adapter 1PPS Time of Day (through serial port) GNSS Figure 7. Linux Software Stack Overview: Single E810-CQDA2T Adapter with GNSS Software Stack Before proceeding, it is recommended to set all SDP pins and U.FL to off (see Section 4.0). 1. Set interface device: # export ETH=`grep 000f /sys/class/net/*/device/subsystem_device | awk -F"/"...
  • Page 45 ® Intel Ethernet Network Adapter E810-CQDA2T User Guide 4. Run phc2sys: # ./phc2sys -s $ETH -O -37 -m The -O -37 can be used to accommodate for leap seconds Note: To update linuxptp version, use git clone: git clone git://git.code.sf.net/p/linuxptp/code To get an appropriate leapfile for RHEL-based Linux distributions: https://github.com/eggert/tz/blob/main/leap-seconds.list...
  • Page 46: Ptp Grand Leader (Gm) With External Gnss Clock

    ® Intel Ethernet Network Adapter E810-CQDA2T User Guide PTP Grand Leader (GM) with External GNSS Clock 5.3.1 External Connections = 1PPS input options Leader Blue = ptp4l Green = 1PPS output Port0 Port1 SMA1 SMA2 U.FL1 E810-CQDA2T U.FL2 Figure 8.
  • Page 47 ® Intel Ethernet Network Adapter E810-CQDA2T User Guide #dmesg [101056.462309] ice 0000:18:00.0: SMA1 RX + U.FL1 TX [101056.462317] ice 0000:18:00.0: UFL2 RX [101090.668497] driver cannot use function 1 on pin 0 4. Run ts2phc: Running on Port 0: # ./ts2phc -f configs/ts2phc-generic.cfg -s generic -m Note: Section 5.8, “Example ts2phc Configuration...
  • Page 48: Boundary Clock Configuration

    DPLLs: DPLL0 drives the external clock source of the E810 controller, while DPLL1 drives the SMA outputs. • If users want to synchronize DPLL1 to ptp4l, then they must use SDP20. • SMA1 Tx and U.FL1 Tx is not a supported configuration on the E810-CQDA2T. 5.4.3 Software Configuration Before proceeding, it is recommended to set all SDP pins and U.FL to off (see...
  • Page 49 ® Intel Ethernet Network Adapter E810-CQDA2T User Guide 3. Enable SMA1 output (for visibility): # echo 2 1 > /sys/class/net/$ETH/device/ptp/ptp*/pins/SMA1 • Enable U.FL1 output: (for visibility): # echo 2 1 > /sys/class/net/$ETH/device/ptp/ptp*/pins/U.FL1 • Enable SMA2 output: (for visibility): # echo 2 2 > /sys/class/net/$ETH/device/ptp/ptp*/pins/SMA2 Note: If U.FL1 if set to Tx, then SMA1 is also set to Rx and cannot be changed.
  • Page 50: Port Configured As Follower

    ® Intel Ethernet Network Adapter E810-CQDA2T User Guide Port Configured as Follower The E810-CQDA2T has one PHC that is shared across all the ports. As a result, only one PTP follower can be run as shown. 5.5.1 External Connections Blue...
  • Page 51 ® Intel Ethernet Network Adapter E810-CQDA2T User Guide 4. Verify if the outputs were set correctly: #dmesg [ 827.397307] ice 0000:18:00.0: SMA1 TX [ 827.397315] ice 0000:18:00.0: SMA2 + U.FL2 disabled [ 837.852127] ice 0000:18:00.0: <DPLL1> state changed to: unlocked, pin CVL-SDP20 [1243.385109] ice 0000:18:00.0: <DPLL1>...
  • Page 52: Synce Setup

    ® Intel Ethernet Network Adapter E810-CQDA2T User Guide SyncE Setup This configuration shows how to specifically setup SyncE. Note that users can use this SyncE configuration with tools such as ptp4l together for clock recovery. SyncE ITU G.811 and G8262 can assist with better frequency synchronization.
  • Page 53: Itu G.8264 Esmc Messaging Using Synce4L

    For GM mode, ensure that input_mode = external is used in the config file. 5.6.4 Two E810-CQDA2T Adapter Configuration without GNSS Figure 12 shows two E810-CQDA2T adapters in a system with a cell site router. U.FL/SMA 1PPS Server E810-CQDA2T Gen4 PHC1 U.FL/SMA 1PPS...
  • Page 54 System Clock phc2sys phc_ctl PHC2 PHC1 Network Adapter 1 Adapter 2 ptp4l ptp4l Figure 13. External Connections: Two E810-CQDA2T Adapters without GNSS Linux Software Stack Adapter 1 Linux software stack: System Clock phc2sys PHC1 Network Tx/Rx Timestamps ptp4l Adapter 1 Figure 14.
  • Page 55 Network Tx/Rx Timestamps ptp4l Adapter 2 Figure 15. External Connections: Two E810-CQDA2T Adapters without GNSS Adapter 2 Software Stack Adapter 2 configuration: 1. Run one instance of ptp4l per E810-CQDA2T: # ptp4l -m -f config.cfg -i ens2f0 -i ens2f1 -i ens2f2 -i ens2f3 2.
  • Page 56: Two E810-Cqda2T Adapter Configuration Without Gnss And With 1Pps

    Ethernet Network Adapter E810-CQDA2T User Guide 5.6.5 Two E810-CQDA2T Adapter Configuration without GNSS and with 1PPS Figure 16 shows two E810-CQDA2T adapters in a system with a 1PPS connection between them. U.FL/SMA 1PPS Server E810-CQDA2T 1 Gen4 x8 PHC1 U.FL/SMA 1PPS...
  • Page 57 ® Intel Ethernet Network Adapter E810-CQDA2T User Guide Adapter 1 Linux software stack: System Clock phc2sys PHC1 Network Tx/Rx Timestamps ptp4l Adapter 1 Figure 18. Linux Software Stack Overview: Adapter 1 (no GNSS) Adapter 1 configuration: 1. Enable 1PPS output on U.FL1: # echo 2 1 >...
  • Page 58 ® Intel Ethernet Network Adapter E810-CQDA2T User Guide Adapter 2 Linux software stack: System Clock phc_ctl ts2phc PHC2 Network Tx/Rx Timestamps ptp4l Adapter 2 1PPS U.FL/SMA Figure 19. Linux Software Stack Overview: Adapter 2 (no GNSS) Adapter 2 configuration: 1. Enable 1PPS input on U.FL2: # echo 1 2 >...
  • Page 59: Two E810-Cqda2T Adapters With Gnss Connection Setup

    ® Intel Ethernet Network Adapter E810-CQDA2T User Guide 5.6.6 Two E810-CQDA2T Adapters with GNSS Connection Setup Figure 20 shows two E810-CQDA2T adapters in a system with a GNNS connection. U.FL/SMA 1PPS Server E810-CQDA2T 1 Gen4 x8 PHC1 GNSS antenna U.FL/SMA 1PPS...
  • Page 60 ® Intel Ethernet Network Adapter E810-CQDA2T User Guide Adapter 1 Linux software stack: System Clock phc2sys ts2phc PHC1 Network Tx/Rx Timestamps ptp4l Adapter 1 1PPS U.FL/SMA 1PPS Time of Day (through serial port) GNSS Figure 22. Linux Software Stack Overview: Adapter 1 (with GNSS) Adapter 1 configuration: 1.
  • Page 61 ® Intel Ethernet Network Adapter E810-CQDA2T User Guide Adapter 2 Linux software stack: System Clock phc2sys ts2phc PHC2 Network Tx/Rx Timestamps ptp4l Adapter 2 1PPS U.FL/SMA 1PPS Time of Day (through serial port) GNSS Figure 23. Linux Software Stack Overview: Adapter 2 (with GNSS) Adapter 2 configuration: 1.
  • Page 62: O-Ran Configuration 1

    ® Intel Ethernet Network Adapter E810-CQDA2T User Guide O-RAN Configuration 1 5.7.1 External Connections Figure 24. External Connections: O-RAN Configuration 1 Note: O-RAN Fronthaul Working Group Control, User and Synchronization Plane Specification, 2020. GNSS GNSS GNSS connected L = Leader...
  • Page 63: Example Ts2Phc Configuration File

    ® Intel Ethernet Network Adapter E810-CQDA2T User Guide Example ts2phc Configuration File [global] use_syslog verbose logging_level ts2phc.pulsewidth 100000000 # For GNSS module ts2phc.nmea_serialport /dev/gnss0 #/dev/gnssX, where X is GNSS device number. leapfile /home/<USER>/linuxptp-4/leapseconds.list [enp1s0f0(dev/ptp4)] ts2phc.extts_polarity rising Note: The leapfile option is available but not necessary for the program to run.
  • Page 64 ® Intel Ethernet Network Adapter E810-CQDA2T User Guide hybrid_e2e net_sync_monitor tx_timestamp_timeout use_syslog verbose summary_interval kernel_leap check_fup_sync # Servo options pi_proportional_const 0.60 pi_integral_const 0.001 pi_proportional_scale pi_proportional_exponent -0.3 pi_proportional_norm_max pi_integral_scale pi_integral_exponent pi_integral_norm_max step_threshold 0.00002 first_step_threshold 0.00002 #first_step_threshold max_frequency 900000000 clock_servo #clock_servo nullf...
  • Page 65: Example Synce4L Configuration File For Bc

    ® Intel Ethernet Network Adapter E810-CQDA2T User Guide #[ens801f1] #serverOnly 5.10 Example synce4l Configuration File for BC Note: For GM mode, ensure that input_mode = external is used in the config file. # Global section is for debuging mostly [global]...
  • Page 66 ® Intel Ethernet Network Adapter E810-CQDA2T User Guide # Valid values are defined in Table 11-7 and Table 11-8 of recommendation # ITU-T G.8264. # They shall be configured appropriately so they are understood by the peer. # external_input_QL corresponds to the SSM code column.
  • Page 67 ® Intel Ethernet Network Adapter E810-CQDA2T User Guide recover_time # Shell command to be executed in order to obtain current EEC status of a # device. eec_get_state_cmd cat /sys/class/net/enp1s0f0/device/dpll_0_state # EEC state values, must equal to values produced by stdout of # "eec_get_state_cmd"...
  • Page 68 ® Intel Ethernet Network Adapter E810-CQDA2T User Guide ############################################################ # next SyncE device section #[<synce2>] #input_mode line # input_mode external # new port belonging to the "new" device #[enp7s0f0] 722960-002...
  • Page 69: Initial Test Setup

    ® Intel Ethernet Network Adapter E810-CQDA2T User Guide Initial Test Setup Two E810-CQDA2T adapters on two systems with a Trimble GM200 used as a timeserver. Test Diagram Oscilloscope = 1pps Blue = ptp4l Green = Scope 1pps Leader External 1pps...
  • Page 70: Follower Adapter

    # echo 2 0 0 1 0 > /sys/class/net/$ETH/device/ptp/ptp*/period Note: As a side effect of having a very accurate DPLL, synchronization between the two E810-CQDA2T adapters can take up to several hours to change to a locked state. 4. Run ptp4l: # ifconfig <network_interface_port0> 192.168.2.2 # ./ptp4l -i <network_interface_port0>...
  • Page 71: Test Results

    ® Intel Ethernet Network Adapter E810-CQDA2T User Guide 6.2.3 Test Results C1 = Trimble GM C2 = Leader E810-CQDA2T C3 = Follower E810-CQDA2T Figure 27. Test Results 722960-002...
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  • Page 73: Appendix A Debug Notes

    ® Intel Ethernet Network Adapter E810-CQDA2T User Guide Appendix A Debug Notes • If you cannot find the SMA or ptpX files, you should check that: — You have the latest NVM. — You have the latest driver. — You ran make install.
  • Page 74 • If you are experiencing problems where ethtool -T does not show Hardware Tx or Rx, you might need to reinsert the Intel ice driver with make install to include the DPK. • Some improperly formatted messages, or tools can also “break” the functionality of GNSS module, making it impossible to send configuration changes to GNSS module.
  • Page 75 Intel Ethernet Network Adapter E810-CQDA2T User Guide • Intel recommends disabling UART1 and UART2 interfaces on the GNSS receiver. To do that, use: 1. Disable UART1 in RAM, and Flash: # ubxtool -v 1 -w 1 -P 29.20 -z CFG-UART1-ENABLED,0,5...
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  • Page 77: Appendix B Glossary And Acronyms

    ® Intel Ethernet Network Adapter E810-CQDA2T User Guide Appendix B Glossary and Acronyms Table 9. Definition of Terms Term Definition Active Antenna Unit Baseband Unit Boundary Clock Best Main Clock Core Network CPRI Common Public Radio Interface Centralized Unit Distributed Unit...
  • Page 78 ® Intel Ethernet Network Adapter E810-CQDA2T User Guide Table 9. Definition of Terms [continued] Term Definition Time of Day Top of Second uRLLC Ultra-Reliable and Low Latency Communications s Microseconds 722960-002...
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  • Page 80 No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document. This document (and any related software) is Intel copyrighted material, and your use is governed by the express license under which it is provided to you.

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