Chip Tests; Bisync Test; Sdlc Test; Troubleshooting - HP 30020B Installation And Service Manual

Intelligent network processor
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Maintenance
4-9. Chip Tests
The fifth portion of the self-test-program performs tests on
the
remaining
portions
of
the
PCA board, namely the communication
chips and the I/O controllers.
4-10. BISYNC TEST
The
first
part
of
the
Universal
Synchronous/Asynchronous
Receiver/Transmitter
(BISYNC)
Test
sets
up the communications
interface and then transmits and receives
100
data
characters.
Errors
detected
will
be data overruns, data parity errors, and
any differences between data transmitted and data received.
The second part of the BISYNC Test takes the data written in
low
memory
and transmits it to higher memory via the BISYNC chip and
DMA.
4-11.
SDLC TEST
The first part of the Universal Synchronous Receive and
Transmit
(SDLC)
Test
sets up the communication interface and then trans-
mits and receives 100 data characters.
Errors detected
will
be
receive errors, receive overruns, and receive aborts.
The second part of the SDLC Test takes the data
written
in
low
memory
and
transmits
it to higher memory via the SDLC chip and
DMA.
4-12.
TROUBLESHOOTING
4-13.
Customer-User Troubleshooting Procedures
If a malfunction is
suspected,
the
customer
user
can
verify
proper
operation
of the INP by initiating the self-test program
described in paragraphs 4-4 through 4-11.
(Actually,
the
self
test
is
initiated automatically from time to time by the system
software during normal operations.
When no
malfunction
is
re-
ported,
operations
continue
without
the
operator necessarily
being aware that a self test has occurred.)
I
CAUTION I·
Before manually
initiating a self
test, be sure that no other compu-
ter
operations
are
in
progress
that may be destroyed by the self-
testing process.
4-5

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