Maintenance
Table 5-1.
Meanings of Self-test LED Indicator Patterns
LED
PATTERN
BEING DISPLAYED
TEST FAILURE SIGNIFIED
BY LED PATTERN
7
6
5
4
3
2
1
0
(WHICH TEST FAILED)
I
*
*
None
l
r
*
*
*
Basic Instruction Set Test
I
*
*
*
ROM Test
*
*
*
SDLC Test
*
*
*
*
SDLC Test with DMA
*
*
*
BI SYNC Test
*
*
*
*
BI SYNC Test w· ith DMA
!
0
0
0
0
*
*
*
RAM Test
*
*
*
*
RAM
Test Parity Error
*
*
*
*
Timer Interrupt Test
*
*
*
*
*
BISYNC and SDLC Tests w/DMA
Legend:
*
=
LED 1 ighted
0 =
When 1 igh ted, the coded pattern signifies which
l
chip (bit) has failed
(see table 5-2)
5-9