Table of Contents
Advertisement
1. RESET circuit
This should be an 'Active
HIGH' RESET circuit. The
89S/89LS devices suffer from
many problem in correctly
entering 'Serial Programming
Mode. The programmer must
output a number of pulses
on the RESET pin which
synchronise the target
device. If a C/R network is
used (C=10µF, R=10K), the
default timings parameters
'T1...T6' should work
correctly. However, if a RESET
'Supervisor Device' is used,
the timings 'T1...T6' must be
altered so that the pulse train
is not filtered out by the
RESET circuit.
2. SCK connection
This is an output from the
programmer and an input to the target device during programming. It is recommended that
this pin is only used as an input on the user target circuit. The Atmel 89S/89LS device may
fail to re-program if the target firmware asserts the SCK pin LOW within 700ms of coming
out of RESET.
3. Protection resistors
It is good EMC design practice to place some limiting resistance on each processor I/O line to
protect against damage from transients. i.e. R2, R3, R4, R5. A very low value of e.g. 10
ohms is recommended. Further protection can be afforded by using ferrites instead of
resistors. The ATmega devices are very sensitive to the voltage slew rate, so use of any
component which slews the edges of the programming signals may cause unreliable
programming.
Micro-ISP
Atmel AT89S/89LS - ISP Notes
Active High
RESET Circuit
USER
XT1
C1
IV User Manual V2.03
Series
C6
Vcc
RESET
ATMEL
AT89SXXXX
Microcontroller
Interrupt
P3
8
P3.0-P3.7
P2
8
P2.0-P2.7
P1
I/O
P1.0-P1.4
5
P0
P0.0-P0.7
8
XTAL1
XTAL2
GND
C2
22
R2
Vcc
C4
R1
U1
1
2
EA
J1
3
Pin
P1.7
SCK
R3
P1.6
MOSI
R4
P1.5
MISO
R5
PROG-RESET
PROG-VCC
LED1
PROG-ACTIVE
PROG-SCK1
PROG-MOSI
PROG-MISO
PROG-GROUND
Advertisement
Table of Contents
