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Chapter 7
Counters
Figure 7-26 shows an example of a sample clocked buffered two-signal separation
measurement.
Figure 7-26. Sample Clocked Buffered Two-Signal Separation Measurement
Sample
Clock
AUX
GATE
SOURCE
Counter Value
Buffer
Hardware-Timed Single Point Two-Signal Separation
Measurement
A hardware-timed single point (HWTSP) two-signal separation measurement has the same
behavior as a sample clocked buffered two-signal separation measurement. Refer to the
Clocked Buffered Two-Signal Separation Measurement
Note
If an active edge on the Gate and an active edge on the AUX does not occur
between sample clocks, an overrun error occurs.
Note (NI USB-63
hardware-timed single point (HWTSP) operations.
For information about connecting counter signals, refer to the
section.
Counter Output Applications
The following sections list the various counter output applications available on X Series devices:
•
Simple Pulse Generation
•
Pulse Train Generation
•
Frequency Generation
•
Frequency Division
•
Pulse Generation for ETS
7-26 | ni.com
1
2
3
xx
Devices)
USB X Series devices do not support
1
2
3
1
3
section for more information.
Default Counter/Timer Pins
2
3
3
3
Sample
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