Icom IC-Q7A Service Manual page 9

The electronic volume control circuit controls AF gain, there-
fore, the AF output level is according to the [VOL] setting and
also the squelch conditions.
4-1-10 SQUELCH CIRCUIT(LOGIC AND RF UNITS)
* NOISE SQUELCH
The noise squelch circuit cuts out AF signals when no RF
signals are received. By detecting noise components in the
AF signals, the squelch circuit switches the AF mute switch.
A portion of the AF signals from the FM IF IC (IC2, pin 9) are
applied to the active filter section (IC2, pin 8). The active fil-
ter section amplifies and filters noise components. The fil-
tered signals are applied to the noise detector section and
output from IC2 (pin 13) as the "SDET" signal.
The "SDET" signal from IC2 (pin 13) passes through the
noise detector (LOGIC unit; IC1), and is then applied to the
CPU (LOGIC unit; IC11, pin 12) via "SQL" line. The CPU ana-
lyzes the noise condition and outputs the "AMUTE" signal to
AF mute switch (Q37).
Even when the squelch is closed, the AF mute switch (Q37)
opens at the moment of emitting beep tones.
* TONE SQUELCH
The tone squelch circuit detects AF signals and opens the
squelch only when receiving a signal containing a matching
subaudible tone (CTCSS). When tone squelch is in use, and
a signal with a mismatched or no subaudible tone is received,
the tone squelch circuit mutes the AF signals even when
noise squelch is open.
A portion of the AF signals from the FM IF IC (IC2, pin 9)
passes through the low-pass filter (LOGIC unit; IC9) to
remove AF (voice) signals and is applied to the CTCSS
decoder inside the CPU (LOGIC unit; IC11, pin 8) via the
"АТОМЕ" line to control the AF mute switch.
4-2 TRANSMITTER CIRCUITS
4-2-1 MICROPHON AMPLIFIER CIRCUIIT
(LOGIC UNIT)
The microphone amplifier circuit amplifies the audio signals
from the microphone, within +6 dB/octave pre-emphasis
characteristics (300 Hz—3 kHz), to a level needed for the
modulation circuit. The microphone amplifier circuit is used
for both the VHF and UHF bands.
The AF signals from the microphone are amplified at the
microphone amplifier (Q12) and the limiter amplifier (Q2)
which has a negative feedback circuit for +6 dB/octave pre-
emphasis.
The amplified signals are applied to the low-pass filter (Q7)
to filler out RF components and are then applied to the RF
unit as the "MOD" signal.
4-2-2 MODULATION CIRCUIT (RF UNIT)
The modulation circuit modulates the VCO oscillating signal
(RF signal) using the microphone AF signals
e VVCO
The applied signals from the limiter amplifier changes the
reactance of D45 to modulate the oscillated signal at the
VVCO circuit (Q32). The modulated signal is amplified at the
buffer amplifiers (IC4, Q40) and is then applied to the drive
amplifier circuit for VHF band.
* UVCO
The applied signals from the limiter amplifier changes the
reactance of D54 to modulate the oscillated signal at the
UVCO circuit (Q28, Q30). The modulated signal is amplified
at the buffer amplifiers (IC4, Q40) and is then applied to the
drive amplifier circuit for UHF band.
4-2-3 DRIVE/POWER AMPLIFIER CIRCUITS
(RF UNIT)
The amplifier circuit amplifies the VCO oscillating signal to
the output power level.
* VHF PA
The signal from the buffer amplifiers (IC4, Q40) is passed
through the Tx/Rx switch (023), and is amplified at the driver
amplifiers (023, 013) and the power amplifiers (09-012) to
obtain 350 mW of RF power.
The amplified signal is passed through the antenna switching
circuit (D16) and low-pass filter, and is then applied to the
antenna connector.
* UHF PA
The amplified signal from IC4, Q40 passes through the Tx/Rx
switch (D28), and is amplified to 300 mW of RF power at the
driver amplifiers (Q22, Q21) and the power amplifiers
(Q17-Q20).
The signal is applied to the antenna connector via the anten-
na switching circuit (D40).
4-3 PLL CIRCUITS
4-3-1 PLL CIRCUIT (RF UNIT)
A PLL circuit provides stable oscillation of the transmit fre-
quency and the receive 1st/2nd LO frequencies. The PLL cir-
cuit compares the phase of the divided VCO frequency to the
reference frequency. The PLL output frequency is controlled
by the divided ratio (N-data) of a programmable divider.
An oscillated signal from the 1st VCO via the buffer amplifiers
(IC4, 043) is applied to the PLL IC (ІСЗ, pin 19) and is
prescaled in the PLL IC based on the divided ratio (N-data).
The reference signal is generated at the reference oscillator
(X1) and is also applied to the PLL IC (pin 16). The PLL IC
detects the out-of-step phase using the reference frequency
and outputs it from pin 13. The output signal is passed
through the loop filter (Q2, Q45) and is then applied to the
VCO circuit as the lock voltage.