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R-V77R
20
® Terminal functions
CIRCUIT DESCRIPTION
[PinNo.
| Pinname | 1/0 |
:
Backup detection pin.
:
PIS/INTS
|
ce
When this goes low level, backup mode is set and the clock stops.
Station presence/absence detection signal input pin :
P12/INT2
j
sD
Used in Auto Tuning and Preset Scan.
High : Station is not present, Low : Station is present.
PII/INT2
Power Key
Key ON when high level at power key input terminal.
Bemocdn
Remote contro! signal input pin after detection : Inputs the remote control signal level
4
P10/INTO
I
.
in normal mode and when reading out the leader code, Detects the signal by interruption
Signal
ae
:
the rising edge when reading the data.
5~8
PTHO3 ~
|
Key
Key matrix return signal inout : Normally high.
PTHOO
Input
(Threshold voltage = VDD x 7.5/16, Conversion time : 32.3ys.)
TIO, TH
I
Not used
No-connection input pin. Fixed at VDD or VSS.
11
P23
2
Le7ee
Output pin to be connected to the CLK pin of LC7565. Normally low.
(CMOS)
CLK
;
:
12
P22/PCL
(@)
Static Driver
LH signa] output pin for the Static Driver 1C (uPD6300C).
(CMOS)
(uPD6300C)
Normally low, and high when data is output.
CLK signal output pin for zPD6300C, TC9162N, TC9164N, TC9176P and LM7001.
TC9176P, TC9162N and TC9164N are not directly connected to the CLK pin of each IC.
13
P21/PTO1
o
CLK
For TC9176P, the VOL IC DATA MUTE signal ANDed with the signal from the CLK pin
(CMOS)
are input to the IC. For TC9162N and TC9164N the switch IC DATA MUTE signal
ANDed with the signal from the CLK pin are input to the IC.
DATA signal output pin for zPD6300C, TC9162N, TC9164N, TC9176P and LM7001,
14
P20/PTOO
ee
DATA
tn the same way as the CLK signal, each DATA MUTE signal is ANDed with this signal
and input to the IC for TC9176P, TC9162N and TC9164N.
15 ~ 18
PO3/S! ~
|
Key
Key matrix returns signal input pin :
POO/INT4
Normally high.
Input
PLLIC
(LM7001) CE
CE signal output pin for the PLL IC (LM7001).
Normally low, and high when data is output.
Strobe signal for the diode switch intake.
Goes low momentarily immediately after Preset, after then it is always high.
ST signal output pin for the switch ICs (TC9162N. and TC9164N).
Normally low, and high when data is output in a monent.
The microprocessor signal is input to the ST pin after differentiating.
With the volume level of the front channel set to between 0 and —28dB, outputs the
muting signal for a short period (about 10msec.) when the TAPE 2 ON/OFF, EQ ON/
OFF, EQ REC ON/OFF, surround ON/OFF, AUDIO
INJECTION
ON/OFF or input
When the volume fevel of the front channel! is set to — co dB, outputs the muting signal.
ST signal output pin of the Front IC for Vol. IC TC9176P.
Normally low : Goes high momentarily when data is output. High when power is OFF.
ST signal output pin of the Rear tC for Vol. |C TC9176P.
Normally low : Goes high monentarily when data is output. High when power is OFF.
Output pin for the signal which makes the DATA or CLK signa! output from P21 and
P20, so that the other 1C does not input to the switch IC.
:
This signal ANDed with the signal from P21, P20 are input to the Switch IC.
DATA signal input pin of EQ IC LC7522.
Diode Switch
a
ee
)
Intake Signal
drain
ek
Switch IC
21
P4121
Gahan
(TC9162N,
es
TC9164N) ST
\drain
oO
22
P120
a
MUTE2
i i
selector is switched.
drain
ie)
N ch
VOL IC ST
oe
pee
( cen
(FRONT)
drain
O
N ch
VOL IC ST
ca
pee
open
(REAR)
drain
oO
N ch
Switch IC
ao 5
Fist
open
DATA MUTE
drain
High when power is OFF.
ie)
Nch\
| EQ IC (LC7522)
a
ee
(con
DATA
High when power is OFF.
drain
.
em
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