Delay By Events; State Table And Mapping Displays - Tektronix 7D01 Instruction Manual

Operating Instructions—7D01 (SN B020000 & up)
7000-SERIES
MAINFRAME
WITH READOUT
VERT TIME
AMPL 7po1 BASE
© EXT
TRIG
oo W.R. OUT IN
_ 9
10X PROBE DATA
INPUT
DATA INPUT (CHANNEL
CONTAINING FAULT)
B CURSOR
MARKERS
FAULT
TRIG + 045
0101 0100
FAULT OCCURS IN CHAN 2 AFTER WORD 0101 0100
1V 100 ns
100 -- -:
90
100-- -|- + -
REAL TIME ANALOG DISPLAY OF FAULT
(2148) 2206-43
Figure 2-8. Equipment setup anddisplays for finding a data fault
and examining it on an analog display.
2-14
that the preselected binary word is to occur before a data
display is initiated. For example, if the digital events delay
plug-in unit is set for an events count readout of 0000025,
the word recognizerwill initiate a display of the data be-
fore, after, or on both sides of the 25th time that the
preselected binary word occurs (see example in Fig. 2-9B).
DELAY BY EVENTS
The following procedure describes a method for positioning
the data display window tovirtually anywhere along a data
train. For this application, the 7D01 is used with a compan-
ion digital events delay plug-in unit (e.g., Tektronix 7D10
Digital Events Delay) in a mainframe with readout.
1. Connect the test equipment as shown in Figure 2-10A.
2. Set the digital events delay plug-in unit for external ac-
coupled + slope triggering.
3. Set the 7D01 TRIGGER SOURCE switch to EXT and
trigger from the external trigger input.
4. Set the mainframe to display the right vertical
compartment.
5. Set the digital events delay plug-in unit for a stable dis-
play triggered on the + slope of the events start trigger
input.
6. Set the digital events delay plug-in unit to indicate the
desired number of clock pulses, on the events count read-
out, that the 7D01 bit-storage window is to be shifted
down the data train. For example, if the digital events ,
delay plug-in unit is set for an events count readout of
0010500, the 7D01 will initiate a display of the data before,
after, or on both sides of the 10,500th clock pulse (see
example in Fig. 2-10B).
STATE TABLE AND MAPPING DISPLAYS
The 7D01 in combination with a display formatter (e.g.,
Tektronix DF1 Display Formatter) adds state table and
mapping displays to the timing diagram display normally
available with the 7D01 alone.
The state table modeenables the data stored in the 7D01
memoryto be displayed in a tabular format. The display
formatter generates the cursor readout in the timing dia-
gram mode, and the state table mode then generates a state
display of 17 samples, starting at the cursor, in hexadecimal,
octal, or binary code.
REV B, JAN 1979
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