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1
D
OCMADDR[0..19]
C
B
OCMADDR10
OCMADDR11
OCMADDR9
OCMADDR8
OCMADDR13
OCMADDR14
OCMADDR12
OCMADDR15
OCMADDR16
OCMADDR18
OCMADDR17
OCMADDR19
A
1
2
OCMDATA[0..7]
OCMADDR[0..19]
+3.3V_DIG
RN800
10k
RN801
10K
1
8
2
7
3
6
4
5
1
8
2
7
3
6
4
5
RN801A 10K
INT_OSC
8-BIT_FLASH2
R800
10K
8-bit_flash1
R801
10K
8-bit_flash3
GND
GND
2
3
4
OCMDATA[0..7]
U801
29LV800BT
16
OCMADDR19
17
OCMADDR18
48
OCMADDR17
1
OCMADDR16
2
OCMADDR15
3
OCMADDR14
4
OCMADDR13
5
OCMADDR12
6
OCMADDR11
7
OCMADDR10
8
OCMADDR9
18
OCMADDR8
19
OCMADDR7
20
OCMADDR6
21
OCMADDR5
22
/OCM_WE
OCMADDR4
/OCM_WE
23
/OCM_RE
OCMADDR3
/OCM_RE
24
/ROM_CS
OCMADDR2
/ROM_CS
25
OCMADDR1
28
/OCM_RE
11
/OCM_WE
R802
4.7K
12
/RESET3.3V
26
/ROM_CS
RN800A
R803
10KX4
10K
Custom1
Custom2
R804
R805
R806
R807
Serial Interface Debug1
Serial Interface Debug2
Serial Interface Debug3
BOOTSTRAP HEADER
OPEN=1
GND
SHUNTED=0
3
4
5
+3.3V_DIG
47
A18
BYTE#
A17
45
OCMADDR0
A16
A-DQ15
43
C800
A15
DQ14
41
47uF/6.3V
A14
DQ13
39
A13
DQ12
36
A12
DQ11
34
A11
DQ10
32
A10
DQ9
30
A9
DQ8
44
OCMDATA7
A8
DQ7
42
OCMDATA6
A7
DQ6
40
OCMDATA5
A6
DQ5
38
OCMDATA4
A5
DQ4
35
OCMDATA3
A4
DQ3
33
OCMDATA2
A3
DQ2
31
OCMDATA1
A2
DQ1
29
OCMDATA0
A1
DQ0
A0
10
OE#
A20/NC
9
WE#
A19/NC
15
RST#
RY/BY#
27
VSS
46
CE#
VSS
10: LOW (Use TCLK)
0
0
11: LOW (set all display output to '0')
0
12: LOW
NC
13: LOW(disable serial interface debug)
14: LOW
15: LOW
16: HIGH (use crystal)
17: LOW (8bit bus with OCM access external ROM)
18: HIGH
19: LOW
Title
Size
Number
Orcad B
Date:
13-Apr-2005
File:
E:\USER\MJ\LP08\YLT-chn\LS08_MAIN_TDA8759-20050223.Ddb
5
6
D
+3.3V_DIG
C801
0.1uF
GND
C
B
A
Revision
Sheet of
Drawn By:
6
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