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F2
H1
J1
G2
J4
K4
F4
G1
H3
J3
F3
H4
H2
J2
G3
K2
K1
M3，M4
P4
P3
R4
Frame Storage Interface
U24,U23
V24,V25
V26
W26
J24
K26
W25
W24
L26
F24~F26,G23~G26
H24~H26,J25,J26,
R24~R26,P24~P26
N23~N26,.......
T24,T25,U25,U26
Y26
Y25
AA24~AA26
AB24~AB26,
AC24~AC26
AD24~AD26
E23, F23, H23, J23,
L23,M23,P23, R23,
T23,V23,W23,Y23,
VDDD33_PLL，
VDDD33_SDDS
VDDD33_DDDS
VSSD33_PLL
VSSD33_SDDS
VSSD33_DDDS
VDDA33_RPLL
VDDA33_FPLL
VDDA33_SDDS
VDDA33_DDDS
VSSA33_RPLL
VSSA33_FPLL
VSSA33_DDDS
VSSA33_DDDS
TCLK
ACS_RSET_HD
RESETn
IR0，IR1
MSTR_SCL
MSTR_SDA
EXTCLK
FSCLKp,FSCLKn
FSRAS,FSCAS
FSWE
FSCKE
FSVREF
FSVREFVSS
FSVREF
FSVREFVSS
FSDQS
FSDATA31~
FSDATA0
FSDQM3~ FSDQM0
FSBKSEL1 ，
FSBKSEL0
FSADDR11~
FSADDR0
FS_2.5
Digital power supply
Digital ground
Analog power supply
Analog ground
Reference clock signal input
External resistance port
System Signal
Reset signal
Main clock output signal
Main data output/input signal 信号
External clock input
Fine storage clock output
Address output
Write enable port
Read enable port
Reference voltage input
Reference voltage ground
Reference voltage input
Reference voltage ground
Data filter
Data input output port
Data output mark
Layer address
Range address output
2.5V power supply
11
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