MSI MS-CF03 User Manual
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MSI MS-CF03 User Manual

MSI MS-CF03 User Manual

Industrial computer board
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MS-CF03
Industrial Computer Board
User Guide

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Summary of Contents for MSI MS-CF03

  • Page 1 MS-CF03 Industrial Computer Board User Guide...

  • Page 2: Table Of Contents

    Contents Regulatory Notices ....................... 4 Safety Information ......................7 Specifications ........................ 8 Motherboard Overview ....................11 Rear I/O Panel ......................12 DisplayPort ......................12 Connector ..................12 USB 3.2 Gen 2 Port ....................12 USB 3.2 Gen 1 Port ....................12 2.5 GbE RJ-45 LAN Jack ..................
  • Page 3 Audio Connectors ....................23 JAUD1: Front Audio Header ......................23 JAMP1: Audio Amplifier Header ....................... 23 Graphics Connectors ..................... 24 JLVDS1: LVDS Wafer Connector ....................... 24 JINVDD1: LVDS Inverter Box Header ....................25 JEDP1: eDP Connector ........................25 Other Connectors ....................26 SYSFAN1: PWM System Fan Box Header ..................

  • Page 4: Regulatory Notices

    Regulatory Notices FCC-B Radio Frequency Interference Statement This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
  • Page 5 ∙ Users should contact the local authorized point of collection for recycling and disposing of their end-of-life products. ∙ Visit the MSI website and locate a nearby distributor for further recycling information. ∙ Users may also reach us at gpcontdev@msi.com for information regarding proper Disposal, Take-back, Recycling, and Disassembly of MSI products.
  • Page 6 ∙ Reduced solid waste production through take-back policy Copyright and Trademarks Notice Copyright © Micro-Star Int’l Co., Ltd. All rights reserved. The MSI logo used is a registered trademark of Micro-Star Int’l Co., Ltd. All other marks and names mentioned may be trademarks of their respective owners. No warranty as to accuracy or completeness is expressed or implied.

  • Page 7: Safety Information

    Safety Information ∙ The components included in this package are prone to damage from electrostatic discharge (ESD). Please adhere to the following instructions to ensure successful computer assembly. ∙ Ensure that all components are securely connected. Loose connections may cause the computer to not recognize a component or fail to start.

  • Page 8: Specifications

    Specifications MS-CF03 Model ∙ 12th Gen Intel® IoTG Alder Lake-N Processor N97, QC, 12W ∙ 12th Gen Intel® IoTG Alder Lake-N Processor N200, QC, 6W Processor ∙ 12th Gen Intel® IoTG Alder Lake-N Core i3-N305, OC, 9W up to 15W ∙...
  • Page 9 MS-CF03 Model Power 1 x 9V~36V DC-in power connector* ∙ 1 x Line-out jack ∙ 2 x 2.5 GbE RJ-45 LAN ports ∙ 2 x Dual Stacked USB 3.2 Type-A ports Rear I/O - 2 x USB 3.2 Gen 2 Type-A ports (Bottom layer, 10 Gbps) - 2 x USB 3.2 Gen 1 Type-A ports (Top layer, 5 Gbps)
  • Page 10 MS-CF03 Model ∙ Windows 10 IoT Enterprise LTSC (64-bit, 21H2) OS Support ∙ Windows 11 IoT Enterprise (64-bit, 22H2, pre-scan) ∙ Linux Kernel 5.xx Ubuntu 22.04.1 LTS (64-bit) (by request) CE, FCC Class B, BSMI, VCCI, RCM, UKCA, IC Certification ∙...

  • Page 11: Motherboard Overview

    Motherboard Overview Rear I/O Panel SYSFAN1 JAUD1 JLVDS1 JAMP1 JRTC1 JSMB1 JCOM2 JVDD1 JINV1 JCOM1 JINVDD1 JCOMP1 JEDP_VDD1 JGPIO1 JEDP1 JPWR1 DIMM1 JFP1 JUSB2 JUSB1 SATA1 M2_B1 JATX1 M2_E1 JBF1 JCMOS1 JUSB3 JPW1 JCSE_DIS1 Motherboard Overview...

  • Page 12: Rear I/O Panel

    Rear I/O Panel 2.5 GbE Line-Out USB 3.2 Gen 1 Ports DisplayPort RJ-45 LAN Jacks Jack USB 3.2 Gen 2 Ports DisplayPort DisplayPort is a digital display interface standard. This connector is used to connect a monitor with DisplayPort inputs. Connector The High-Definition Multimedia Interface (HDMI™) is an all-digital audio/ video interface capable of transmitting uncompressed streams.

  • Page 13: 2.5 Gbe Rj-45 Lan Jack

    2.5 GbE RJ-45 LAN Jack The standard single RJ45 LAN jack is provided for connection to the Local Area Network (LAN). You can connect a network cable to it. Link/ Activity LED Speed LED Status Description Status Description No link 10/100 Mbps Linked Yellow...

  • Page 14: Me Overview

    ME Overview Board Dimension Unit of measurement: mm 17,80 20,55 18,89 11,08 13,55 18,37 20,92 12,85 95,20 102,00 134,00 146,00 16,34 1,60 18,40 ME Overview...

  • Page 15: Suggested Chassis I/O Gap Dimension

    Suggested Chassis I/O Gap Dimension Chassis Gap: 1.5mm (min) ME Overview...
  • Page 16 Component Contents Component Page Memory DIMM1: DDR5 SO DIMM Slot Storage SATA1: SATA 3.0 6Gb/s Port M2_B1: M.2 Slot (B Key, 2242, 3042, 2280) Expansion Slots M2_B1: M.2 Slot (B Key, 2242, 3042, 2280) M2_E1: M.2 Slot (E Key, 2230) Connectors Power Connectors JPWR1: 4-Pin DC-In Main Power Connector...

  • Page 17: Memory

    Memory DIMM1: DDR5 SO DIMM Slot The SO-DIMM slots is intended for memory modules. DIMM1 Installing DDR5 Memory 1. Locate the SO-DIMM slot. Align the notch on the DIMM with the key on the slot and insert the DIMM into the slot. 2.

  • Page 18: Storage

    Storage SATA1: SATA 3.0 6Gb/s Port This connector is SATA 6Gb/s interface port, it can connect to one SATA device. SATA1 ⚠ Important This SATA port supports hot plug. ∙ ∙ Please do not fold the SATA cable at a 90-degree angle. Data loss may result during transmission otherwise.

  • Page 19: M2_B1: M.2 Slot (B Key, 2242, 3042, 2280)

    M2_B1: M.2 Slot (B Key, 2242, 3042, 2280) Please install the solid-state drive (SSD) into the M.2 slot as shown below. Feature ∙ Supports SATA 3.0 signal. ∙ Supports B+M Key SATA 3.0 SSD. ⚽ M2_B1 Video Demonstration Watch the video to learn how to Install M.2 SSD.

  • Page 20: Expansion Slots

    Expansion Slots M2_E1 M2_B1 M2_B1: M.2 Slot (B Key, 2242, 3042, 2280) Please install the module card into the M.2 slot as shown below. Feature ∙ Supports PCIe x1 signal. ∙ Supports B+M key PCIe x1 module. Expansion Slots...

  • Page 21: M2_E1: M.2 Slot (E Key, 2230)

    M2_E1: M.2 Slot (E Key, 2230) Please install the Wi-Fi/ Bluetooch card into the M.2 slot as shown below. Feature ∙ Supports PCIe x1 & USB 2.0 signal. ∙ Supports Intel® Wi-Fi 6E AX210 + BT 5.2 wireless card. ⚠ Important When adding or removing expansion cards, make sure that you unplug the power supply first.

  • Page 22: Connectors

    Connectors Power Connectors JPWR1 JPW1 JPWR1: 4-Pin DC-In Main Power Connector This connector allows you to connect an power supply. DC-IN DC-IN JPWR1 JPW1: 4-Pin SATA Power Connector This connector is used to provide power to SATA devices. JPW1 ⚠ Important Make sure that all the power cables are securely connected to a proper power supply to ensure stable operation of the system.

  • Page 23: Audio Connectors

    Audio Connectors JAUD1 JAMP1 JAUD1: Front Audio Header This connector allows you to connect front panel audio. LINE_IN_RA MIC1_RA LINE_IN_LA MIC1_LA LOUT_RA MIC1_JD JAUD1 LOUT_LA LINE_IN_JD FRONT_JD JAMP1: Audio Amplifier Header The connector is used to connect audio amplifiers to enhance audio performance. AMP_L- AMP_L+ JAMP1...

  • Page 24: Graphics Connectors

    Graphics Connectors JLVDS1 JINVDD1 JEDP1 JLVDS1: LVDS Wafer Connector This connector is designed for use with LVDS interface flat panels. When connecting your flat panel to this connector, be sure to check the panel datasheet to ensure that you set the LVDS power select jumper (JVDD1) to the appropriate power voltage. LCD_VDD LCD_VDD LCD_VDD...

  • Page 25: Jinvdd1: Lvds Inverter Box Header

    JINVDD1: LVDS Inverter Box Header The connector is provided for LCD backlight options, be sure to check the panel datasheet to ensure that you set the LVDS Inverter Power Select Jumper (JINV1) to the appropriate power voltage (5V/12V). 5V/12V 5V/12V JINVDD1 BKLT_EN BKLT_CTRL...

  • Page 26: Other Connectors

    Other Connectors SYSFAN1: PWM System Fan Box Header The fan power connector supports system cooling fans with +12V. When connecting the wire to the connectors, always note that the red wire is the positive and should be connected to the +12V; the black wire is Ground and should be connected to GND. FAN POWER SYSFAN1 FAN SENSE...

  • Page 27: Jcom1, Jcom2: Com Port Box Headers

    JCOM1, JCOM2: COM Port Box Headers This connector is a 16550A high speed communications port that sends/ receives 16 bytes FIFOs. You can attach a serial device to it. DCD# SOUT JCOM1 DSR# JCOM2 CTS# VCC_COM (JCOM1) No pin NC (JCOM2) ∙...

  • Page 28: Jgpio1: Gpio (Dio) Box Header

    JGPIO1: GPIO (DIO) Box Header This connector is provided for the General-Purpose Input/Output (GPIO) peripheral module. VCC5 GPO0 GPI0 JGPIO1 GPO1 GPI1 GPO2 GPI2 GPO3 GPI3 JUSB1~3: USB 2.0 Box Headers These connectors are ideal for connecting USB devices such as keyboard, mouse, or other USB-compatible devices.

  • Page 29: Jrtc1: Cmos Battery Header

    JRTC1: CMOS Battery Header If the CMOS battery is out of charge, the time in the BIOS will be reset and the data of system configuration will be lost. In this case, you need to replace the CMOS battery. JRTC1 Replacing CMOS battery 1.

  • Page 30: Jumpers

    Jumpers ⚠ Important Avoid adjusting jumpers when the system is on; it will damage the motherboard. JINV1 JVDD1 JEDP_VDD1 JCOMP1 JCMOS1 JCSE_DIS1 JATX1 Jumper Name Default Setting Description COM Power Select Jumper JCOMP1 1-2: 5V Power (Default) 2-3: 12V Power Clear CMOS Jumper JCMOS1 1-2: Normal (Default)
  • Page 31 Jumper Name Default Setting Description LVDS Inverter Power Select Jumper JINV1 1-2: 5V (Default) 2-3: 12V eDP Power Select Jumper JEDP_VDD1 1-2: 5V 2-3: 3V (Default) Jumpers...

  • Page 32: Bios Setup

    BIOS Setup This chapter provides information on the BIOS Setup program and allows users to configure the system for optimal use. Users may need to run the Setup program when: ∙ An error message appears on the screen at system startup and requests users to run SETUP.
  • Page 33 Control Keys ← → Select Screen ↑ ↓ Select Item Enter Select Change Value Exit General Help Previous Values Optimized Defaults Save & Reset* Screenshot capture Scroll help area upwards <K> <M> Scroll help area downwards * When you press <F10>, a confirmation window appears and it provides the modification information.
  • Page 34 BIOS Item Contents Item Page The Menu Bar Main System Date System Time SATA Mode Selection Advanced Full Screen Logo Display Bootup NumLock State CPU Configuration ■ Intel Virtualization Technology ■ Active Efficient-cores ■ Intel(R) SpeedStep(TM) ■ Intel(R) Speed Shift Technology ■...
  • Page 35 Item Page ■ Core BIOS Done Message ■ Firmware Update Configuration ■ PTT Configuration ■ ME Debug Configuration ■ Anti-Rollback SVN Configuration Trusted Computing ■ Security Device Support ■ SHA256/ SHA384 PCR Bank ■ Pending Operation ■ Platform Hierarchy, Storage Hierarchy, Endorsement Hierarchy ■...

  • Page 36: The Menu Bar

    The Menu Bar ▶ Main Use this menu for basic system configurations, such as time, date, etc. ▶ Advanced Use this menu to set up the items of special enhanced features. ▶ Boot Use this menu to specify the priority of boot devices. ▶...

  • Page 37: Main

    Main HDD Information ∙ RAID (VMD) Disabled: Display HDD information as plugging in status. ∙ RAID (VMD) Enabled: Display "Empty" only. *SATA_2 is for M.2 B key (SATA signal) ▶ System Date This setting allows you to set the system date. Use <Tab> key to switch between date elements.

  • Page 38: Advanced

    Advanced ▶ Full Screen Logo Display This BIOS feature determines if the BIOS should hide the normal POST messages with the motherboard or system manufacturer’s full-screen logo. [Enabled] BIOS will display the full-screen logo during the boot-up sequence, hiding normal POST messages. [Disabled] BIOS will display the normal POST messages, instead of the full- screen logo.
  • Page 39 ▶ CPU Configuration ▶ Intel Virtualization Technology Enables or disables Intel Virtualization technology. [Enabled] Enables Intel Virtualization technology and allows a platform to run multiple operating systems in independent partitions. The system can function as multiple systems virtually. [Disabled] Disables this function. ▶...
  • Page 40 ▶ Intel(R) Speed Shift Technology Intel® Speed Shift Technology is an energy-efficient method that allows frequency control by hardware rather than the OS. [Enabled] When enabled, Intel® Speed Shift Technology is activated. The technology enables the management of processor power consumption via hardware performance state (P-State) transitions.
  • Page 41 ▶ Super IO Configuration ▶ Serial Port 1/ 2 This setting enables or disables the specified serial port. » Change Settings This setting is used to change the address & IRQ settings of the specified serial port. » Mode Select Select an operation mode for Serial Port 1/ 2.
  • Page 42 ▶ H/W Monitor (PC Health Status) These items display the current status of all monitored hardware devices/ components such as voltages, temperatures and all fans’ speeds. ▶ Thermal Shutdown This setting determines the behavior of the system when the CPU temperature reaches a predefined threshold.
  • Page 43 ▶ PCI/PCIE Device Configuration ▶ Audio Controller This setting enables or disables the detection of the onboard audio controller. ▶ Network Stack Configuration This menu provides Network Stack settings for users to enable network boot (PXE) from BIOS. ▶ Network Stack This menu provides Network Stack settings for users to enable network boot (PXE) from BIOS.
  • Page 44 ▶ GPIO Group Configuration ▶ GPO0 ~ GPO3 These settings control the operation mode of the specified GPIO. ▶ PCIE ASPM settings This menu provide settings for PCIe ASPM (Active State Power Management) level for different installed devices. ▶ M2_B1/ M2_E1 Sets PCI Express ASPM (Active State Power Management) state for power saving.

  • Page 45: Boot

    Boot ▶ Boot Option #1-2 This setting allows users to set the sequence of boot devices where BIOS attempts to load the disk operating system. Boot...

  • Page 46: Security

    Security ▶ Administrator Password Administrator Password controls access to the BIOS Setup utility. ▶ User Password User Password controls access to the system at boot and to the BIOS Setup utility. Security...
  • Page 47 ▶ PCH-FW Configuration This menu allows you to configure settings related to the PCH firmware. Firmware Information These settings show the ME Firmware Version System Integrity Value firmware information of ME Firmware Mode ME Firmware Status 1-2 the Intel ME (Management Engine).
  • Page 48 ▶ Firmware Update Configuration This menu will display when ME State is enabled. » ME FW Image Re-Flash Enables or disables the ME Firmware Image Re-flashing. » Local FW Update Enables or disables the capability to perform a firmware update of the ME locally. ▶...
  • Page 49 » CPU Replaced Polling Disable Setting this option disables the CPU replacement polling loop. » HECI Message Check Disable This setting disables message check for BIOS boot path when sending messages. » MBP HOB Skip Setting this option will skip ME’s Memory-Based Protection (MBP) H0B region. »...
  • Page 50 ▶ Trusted Computing ▶ Security Device Support This item enables or disables BIOS support for security device. When set to [Disable], the OS will not show security device. ▶ SHA256/ SHA384 PCR Bank These settings enables or disables the SHA256 PCR Bank and SHA384 PCR Bank. ▶...
  • Page 51 ▶ Serial Port Console Redirection ▶ Console Redirection Console Redirection operates in host systems that do not have a monitor and keyboard attached. This setting enables or disables the operation of console redirection. When set to [Enabled], BIOS redirects and sends all contents that should be displayed on the screen to the serial COM port for display on the terminal screen.
  • Page 52 ▶ Console Redirection Settings (COM1) » Terminal Type To operate the system’s console redirection, you need a terminal supporting ANSI terminal protocol and a RS-232 null modem cable connected between the host system and terminal(s). You can select emulation for the terminal from this setting. [ANSI] Extended ASCII character set.
  • Page 53 ▶ Secure Boot ▶ Secure Boot Secure Boot function can be enabled only when the Platform Key (PK) is enrolled and running accordingly. ▶ Secure Boot Mode Selects the secure boot mode. This item appears when Secure Boot is enabled. [Standard] The system will automatically load the secure keys from BIOS.
  • Page 54 ▶ Key Management Press Enter key to enter the sub-menu. Manage the secure boot keys. This item appears when “Secure Boot Mode” sets to [Custom]. » Platform Key (PK): The Platform Key (PK) can protect the firmware from any un-authenticated changes.
  • Page 55 » Append Key Loads an additional db from storage devices to your system. » Delete Key Deletes the db from your system. » Forbidden Signatures (dbx): Forbidden Signatures (dbx) lists the forbidden signatures that are not trusted and cannot be loaded. »...

  • Page 56: Chipset

    Chipset ▶ DVMT Total Gfx Mem This setting specifies the total graphics memory size for Dynamic Video Memory Technology (DVMT). ▶ LVDS Panel Type This setting specifies the LVDS Panel’s resolution and distribution formats. ▶ Backlight Control This setting controls the intensity of the LED’s backlight output. When lighting conditions are brighter, set it high for a clearer image and low when it is darker.

  • Page 57: Power

    Power ▶ Restore AC Power Loss This setting specifies whether your system will reboot after a power failure or interrupt occurs. Available settings are: [Power Off] Leaves the computer in the power off state. [Power On] Leaves the computer in the power on state. [Last State] Restores the system to the previous status before power failure or interrupt occurred.

  • Page 58: Save & Exit

    Save & Exit ▶ Save Changes and Reset Save changes to CMOS and reset the system. ▶ Discard Changes and Exit Abandon all changes and exit the Setup Utility. ▶ Discard Changes Abandon all changes. ▶ Load Optimized Defaults Use this menu to load the default values set by the motherboard manufacturer specifically for optimal performance of the motherboard.

  • Page 59: Gpio Wdt Bkl Smbus Access Programming

    GPIO WDT BKL SMBus Access Programming This chapter provides GPIO (General Purpose Input/ Output), WDT (Watch Dog Timer), LVDS Backlight and SMBus Access programming guide. Abstract In this section, code examples based on C programming language provided for customer interest. Inportb, Outportb, Inportl and Outportl are basic functions used for access IO ports and defined as following.

  • Page 60: General Purpose Io

    General Purpose IO 1. General Purposed IO – GPIO/DIO The GPIO port configuration addresses are listed in the following table: Name IO Port IO address Name IO Port IO address N_GPI0 0xA10 Bit 0 N_GPO0 0xA10 Bit 4 N_GPI1 0xA10 Bit 1 N_GPO1 0xA10...

  • Page 61: Watchdog Timer

    Watchdog Timer 2. Watchdog Timer – WDT The base address (WDT_BASE) of WDT configuration registers is 0xA10. Set WDT Time Unit val = Inportb (WDT_BASE + 0x05); // Read current WDT setting val = val | 0x08; // minute mode. val = val & 0xF7 if second mode Outportb (WDT_BASE + 0x05, val);...
  • Page 62 Disable WDT val = Inportb (WDT_BASE + 0x05); // Read current WDT setting val = val & 0xDF; // Disable WDT by set WD_EN (bit 5) to 0. Outportb (WDT_BASE + 0x05, val); // Write back WDT setting. Check WDT Reset Flag If the system has been reset by WDT function, this flag will set to 1.

  • Page 63: Lvds Backlight Control

    LVDS Backlight Control 3. LVDS Backlight Control – BKL The controller support LVDS backlight level control from 0(0%) to 255(100%), the default backlight level is 100%. It must be controlled by SMBus access. The details of SMBus access (SMBus_ReadByte, SMBus_WriteByte) are provided in this document. Set the Level of LVDS Backlight 1.

  • Page 64: Smbus Access

    SMBus Access 4. SMBus Access The base address of SMBus must know before access. The relevant bus and device information are as following. #define IO_SC 0xCF8 #define IO_DA 0xCFC #define PCIBASEADDRESS 0x80000000 #define PCI_BUS_NUM #define PCI_DEV_NUM #define PCI_FUN_NUM Get SMBus Base Address int SMBUS_BASE;...
  • Page 65 mdelay (20); //delay 20ms to let data ready while ((Inportl ( ) & 0x01) != 0); //wait SMBus ready SMBUS_BASE _DATA = Inportb (LOWORD ( ) + 0x05); //input Base + 05 SMBUS_BASE SMBus_WriteByte (char DEVID, char offset, char DATA) Write DATA to OFFSET on SMBus device DEVID.

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