Supermicro H8SSP-8 User Manual

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H8SSP-8

H8SSP-i

USER'S MANUAL

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Page 1 H8SSP-8 H8SSP-i USER’S MANUAL Revision 1.0...
Page 2 The information in this User’s Manual has been carefully reviewed and is believed to be accurate. The vendor assumes no responsibility for any inaccuracies that may be contained in this document, makes no commitment to update or to keep current the information in this manual, or to notify any person or organization of the updates.
Page 3: Manual Organization
This manual is written for system integrators, PC technicians and knowledgeable PC users. It provides information for the installation and use of the H8SSP-8/H8SSP-i serverboard. The H8SSP-8/H8SSP-i is based on the Server- Works HT-2000/1000 chipset and supports a single AMD Opteron processor (single or dual core) in 940-pin microPGA ZIF sockets and up to 16 GB of DDR333/266 or 8 GB of DDR400.
Page 4: Table Of Contents
Manual Organization ....................iii Chapter 1: Introduction Overview ......................1-1 Checklist ....................1-1 H8SSP-8/H8SSP-i Image ................. 1-2 H8SSP-8/H8SSP-i Serverboard Layout ........... 1-3 H8SSP-8/H8SSP-i Quick Reference ............1-4 Serverboard Features ................1-5 ServerWorks HT-2000/1000 Chipset: System Block Diagram ....1-7 Chipset Overview ................... 1-8 PC Health Monitoring ..................
Page 5 Table of Contents USB2/3 Headers ..................2-10 Serial Ports ..................... 2-10 Fan Headers ..................2-10 Chassis Intrusion ..................2-10 Power LED/Speaker ................2-11 ATX PS/2 Keyboard/Mouse Ports ............2-11 JLAN1/2 (Ethernet Ports) ............... 2-11 IPMB Header ..................2-11 DOC Power Header ................2-12 Wake-On-Ring ..................
Page 6 H8SSP-8/H8SSP-i User’s Manual Memory Errors ..................3-2 Losing the System’s Setup Conﬁ guration ..........3-2 Technical Support Procedures ............... 3-2 Frequently Asked Questions ................3-3 Returning Merchandise for Service ..............3-4 Chapter 4: BIOS Introduction ..................... 4-1 Main Setup ..................... 4-2 Advanced Settings Menu ................
Page 7: Chapter 1: Introduction
Please check that the following items have all been included with your serverboard. If anything listed here is damaged or missing, contact your retailer. One (1) H8SSP-8 or H8SSP-i serverboard One (1) IDE cable (CBL-036) One (1) ﬂ oppy cable (CBL-022)
Page 8: H8Ssp-8/H8Ssp-I Image
H8SSP-8/H8SSP-i User’s Manual Figure 1-1. H8SSP-8/H8SSP-i Image Note: the H8SSP-8 is pictured. The H8SSP-i shares the same layout but without SCSI controllers, jumpers or connectors.
Page 9: H8Ssp-8/H8Ssp-I Serverboard Layout
Chapter 1: Introduction Figure 1-2. H8SSP-8/H8SSP-i Serverboard Layout (not drawn to scale) Mouse JPB1 COM1 U320 SCSI CHB LAN2 LAN1 USB0/1 BIOS Battery C1/JI JPXBO JPXAO Rage JWOL1 JWOR AIC-7902W JWD1 JBT1 JPG1 JPA2 JPA3 Speaker HT-1000 DB8/7/6/5/4/3/2/1 JSM1 COM2...
Page 10: H8Ssp-8/H8Ssp-I Quick Reference
H8SSP-8/H8SSP-i User’s Manual H8SSP-8/H8SSP-i Quick Reference Jumpers Description Default Setting JBT1 CMOS Clear See Section 2-7 Onboard Spkr En/Disable Pins 6-7 (Enabled) C1/2 C to PCI Enable/Disable Closed (Enabled) JP17 DOC Bus Select Closed (Master) JPA1* SCSI Enable/Disable Pins 1-2 (Enabled) JPA2/JPA3* SCSI Channel A/B Term.
Page 11: Serverboard Features
Chapter 1: Introduction Serverboard Features • Single AMD Opteron 200 series 64-bit processors in a 940-pin microPGA ZIF socket Memory • Four dual/single channel DIMM slots supporting up to 16 GB of registered ECC DDR333/266 or up to 8 GB of registered ECC DDR400 SDRAM Note: Refer to Section 2-4 before installing.
Page 12 • Internal/external modem ring-on Onboard I/O • Adaptec AIC-7902W SCSI controller for dual-channel Ultra320 SCSI, RAID 0, 1 and 10 supported (H8SSP-8 only) • ServerWorks SATA controller for four-port SATA • One (1) ATA100 IDE port • One (1) ﬂ oppy port interface (up to 2.88 MB) •...
Page 13: Serverworks Ht-2000/1000 Chipset: System Block Diagram
Chapter 1: Introduction 184- pin DIMMs Opteron Processor 144 -bit, 266 -400 MT/s 16 x 16 @ 1 GB 133 MHz PCI-X Slot x8 PCI-Express Slot ServerWorks HT-2000 2x Gigabit x8 PCI-Express Slot Ethernet 8 x 8 @ 800MB ATA100 Adaptec AIC-7902 W ServerWorks...
Page 14: Chipset Overview
H8SSP-8/H8SSP-i User’s Manual Chipset Overview The H8SSP-8/H8SSP-i serverboard is based on a ServerWorks' chipset composed of two main components: the HT-2000 HyperTransport SystemI/O controller and the HT-1000 HyperTransport SystemI/O Hub. The HT-2000/1000 chipset provides high performance, scalability and reliability. Its HyperTransport architecture reduces IO bottlenecks to improve overall system performance.
Page 15: Pc Health Monitoring
Chapter 1: Introduction PC Health Monitoring This section describes the PC health monitoring features of the H8SSP-8/H8SSP-i. The serverboard has an onboard System Hardware Monitor chip that supports PC health monitoring. Onboard Voltage Monitors for the CPU core voltage, +2.5V, +5V, +1.2V, ±12V, +5V standby, +2.5V standby and Battery Voltage...
Page 16: Power Confi Guration Settings
H8SSP-8/H8SSP-i User’s Manual Power Conﬁ guration Settings This section describes the features of your serverboard that deal with power and power settings. Microsoft OnNow The OnNow design initiative is a comprehensive, system-wide approach to system and device power control. OnNow is a term for a PC that is always on but appears to be off and responds immediately to user or other requests.
Page 17: Power Supply
CPU, some are inadequate. A 2 amp current supply on a 5V Standby rail is strongly recommended. Note that the power supply connectors on the H8SSP-8/H8SSP-i are of a proprietary design and require a proprietary power supply for proper connection.
Page 18: Super I/O
H8SSP-8/H8SSP-i User’s Manual Super I/O The disk drive adapter functions of the Super I/O chip include a ﬂ oppy disk drive controller that is compatible with industry standard 82077/765, a data separator, write pre-compensation circuitry, decode logic, data rate selection, a clock genera- tor, drive interface control logic and interrupt and DMA logic.
Page 19: Chapter 2: Installation
Chapter 2: Installation Chapter 2 Installation Static-Sensitive Devices Electric Static Discharge (ESD) can damage electronic com ponents. To prevent damage to your system board, it is important to handle it very carefully. The following measures are generally sufﬁ cient to protect your equipment from ESD. Precautions •...
Page 20: Processor And Heatsink Installation
H8SSP-8/H8SSP-i User's Manual Processor and Heatsink Installation Exercise extreme caution when handling and installing the proces- sor. Always connect the power cord last and always remove it be- fore adding, removing or changing any hardware components. Installing the CPU Backplates A CPU backplate (BKT-0004) is an optional item that may be included in the retail box.
Page 21 Chapter 2: Installation 4. With the CPU inserted into the socket, inspect the four corners of the CPU to make sure that it is properly installed and ﬂ ush with the socket. 5. Gently press the CPU socket lever down until it locks in the plastic tab. Installing the Heatsink Retention Module One heatsink retention module (BKT-0005) and two screws are included in the retail box.
Page 22: Mounting The Serverboard Into A Chassis
1. Check the compatibility of the serverboard ports and the I/O shield The H8SSP-8/H8SSP-i serverboard requires a chassis that can support extended ATX boards 16.235" x 11.24" in size. Make sure that the I/O ports on the serverboard align with their respective holes in the I/O shield at the rear of the chassis.
Page 23 Chapter 2: Installation Support The H8SSP-8/H8SSP-i supports single or dual-channel, registered ECC DDR400/333/266 SDRAM. Both interleaved and non-interleaved memory are supported, so you may populate any number of DIMM slots (see note on previous page). Populating two adjacent slots at a time with memory modules of the same size and type will result in interleaved (128-bit) memory, which is faster than non-interleaved (64-bit) memory.
Page 24: I/O Port And Control Panel Connections
H8SSP-8/H8SSP-i User's Manual I/O Port and Control Panel Connections The I/O ports are color coded in conformance with the PC99 speciﬁ cation to make setting up your system easier. See Figure 2-3 below for the colors and locations of the various I/O ports.
Page 25: Connecting Cables
Deﬁ nition Pin # Deﬁ nition Connector Ground Ground Ground The primary power supply connector Ground (J43) on the H8SSP-8/H8SSP-i is a +3.3V Ground proprietary design with unique pinouts +3.3V Ground and requires the correct proprietary +5VSB Ground power supply to operate. Refer to the...
Page 26: Hdd Led
H8SSP-8/H8SSP-i User's Manual HDD LED HDD LED The HDD (IDE Hard Disk Drive) LED Pin Deﬁ nitions (JF1) connection is located on pins 13 and Pin# Deﬁ nition 14 of JF1. Attach the IDE hard drive LED cable to display disk activity.
Page 27: Power Fail Led
Chapter 2: Installation Power Fail LED Power Fail LED Pin Deﬁ nitions (JF1) The Power Fail LED connection is lo- Pin# Deﬁ nition cated on pins 5 and 6 of JF1. See the table on the right for pin deﬁ nitions. Control Note: This feature is only available when using redundant power supplies.
Page 28: Usb2/3 Headers
H8SSP-8/H8SSP-i User's Manual USB2/3 Headers Extra Universal Serial Bus Headers Pin Deﬁ nitions (USB2/3) Tw o a d d i t i o n a l U S B 2 . 0 h e a d - USB2 USB3/4 Pin # Deﬁ...
Page 29: Power Led/Speaker
Chapter 2: Installation Power LED/Speaker PWR LED Connector Pin Deﬁ nitions (JD1) Pin# Deﬁ nition On JD1, pins 1, 2, and 3 are for the +Vcc power LED and pins 4 through 7 are for the speaker. See the tables on the -Vcc right for pin deﬁ...
Page 30: Doc Power Header
H8SSP-8/H8SSP-i User's Manual DOC Power Header DOC Power Header Pin Deﬁ nitions (JWF1) Pin# Deﬁ nition JWF1 is a power header for a DOC (Disk-On-Chip) device. Connect the appropriate cable here to provide Ground power to a DOC device on your sys- Signal tem.
Page 31: Jumper Settings
Chapter 2: Installation Jumper Settings Explanation of Jumpers To modify the operation of the serverboard, jumpers can be used to choose between optional settings. Jumpers create shorts between two pins to change the function of the connector. Pin 1 is identiﬁ ed with a square solder pad on the printed circuit board.
Page 32: Pci-X#1/Pci-X#2 Frequency Select
H8SSP-8/H8SSP-i User's Manual PCI-X#1/#2 Frequency Select PCI-X#1/#2 Frequency Select Jumper Settings Jumpers JXAO and JXBO are used (JXAO/JXBO) to set the speed of PCI-X slots 1 and Jumper Setting Deﬁ nition 2, respectively. The recommended Pins 1-2 66 MHz PCI-X (default) setting is open for Auto.
Page 33: Scsi Controller Enable/Disable
Chapter 2: Installation SCSI Controller Enable/ Disable (H8SSP-8 only) SCSI Enable/Disable Jumper Settings (JPA1) Jumper JPA1 is used to enable or dis- Both Jumpers Deﬁ nition able the Adaptec AIC-7902W SCSI Pins 1-2 Enabled controller. The default setting is on pins...
Page 34: I 2 C To Pci Enable/Disable
H8SSP-8/H8SSP-i User's Manual C to PCI Enable/Disable C1/2 pair of jumpers allow you to connect the System Management Bus C to PCI Enable/Disable Jumper Settings to any one of the PCI slots. The default C1/JI setting is closed for both jumpers to en- Jumper Setting Deﬁ...
Page 35: Scsi Activity Leds
Chapter 2: Installation SCSI Activity LEDs (H8SSP- SCSI Channel Activity LEDs 8 only) (DA1/DA2) State System Status There are two SCSI activity LEDs on SCSI Channel Active the serverboard. When illuminated, SCSI Channel Inactive DA1 indicates activity on SCSI chan- nel A and DA2 indicates activity on SCSI channel B.
Page 36: Floppy, Ide, Scsi And Sata Drive Connections
H8SSP-8/H8SSP-i User's Manual Floppy, IDE, SCSI and SATA Drive Connections Use the following information to connect the ﬂ oppy and hard disk drive cables. The ﬂ oppy disk drive cable has seven twisted wires. A red mark on a wire typically designates the location of pin 1.
Page 37: Ide Connectors
Chapter 2: Installation IDE Connectors IDE Drive Connectors Pin Deﬁ nitions (JIDE#1) Pin# Deﬁ nition Pin # Deﬁ nition There are no jumpers to con- ﬁ gure the onboard IDE connec- Reset IDE Ground tor. See the table on the right Host Data 7 Host Data 8 for pin deﬁ...
Page 38: Scsi Connectors
H8SSP-8/H8SSP-i User's Manual SCSI Connectors Ultra320 SCSI Drive Connectors Pin Deﬁ nitions (JA1/JB1) (H8SSP-8 only) Pin# Deﬁ nition Pin # Deﬁ nition Refer to the table at right for +DB (12) -DB (12) pin deﬁ nitions for the Ultra320 +DB (13)
Page 39: Sata Connector
Chapter 2: Installation SATA 4-Port Connector Pin Deﬁ nitions (JSM1) SATA Connector Pin# Deﬁ nition Pin # Deﬁ nition Ground RXD+ There are no jumpers to con- RXD- Ground figure the SATA connector. TXD- TXD+ JSM1 is a 4-port connector that Ground RX1+ includes designations SATA0...
Page 40 H8SSP-8/H8SSP-i User's Manual Notes 2-22...
Page 41: Chapter 3: Troubleshooting
Chapter 3: Troubleshooting Chapter 3 Troubleshooting Troubleshooting Procedures Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC power cord before adding, changing or installing any hardware components.
Page 42: Memory Errors
H8SSP-8/H8SSP-i User's Manual NOTE If you are a system integrator, VAR or OEM, a POST diagnostics card is recommended. For I/O port 80h codes, refer to App. B. Memory Errors 1. Make sure that the DIMM modules are properly and fully installed.
Page 43: Frequently Asked Questions
Frequently Asked Questions Question: What type of memory does my serverboard support? Answer: The H8SSP-8/H8SSP-i supports up to 16 GB of registered ECC DDR333/266 or up to 8 GB of registered ECC DDR400 interleaved or non-inter- leaved SDRAM. See Section 2-4 for details on installing memory.
Page 44: Returning Merchandise For Service
H8SSP-8/H8SSP-i User's Manual Returning Merchandise for Service A receipt or copy of your invoice marked with the date of purchase is required be- fore any warranty service will be rendered. You can obtain service by calling your vendor for a Returned Merchandise Authorization (RMA) number. When returning to the manufacturer, the RMA number should be prominently displayed on the outside of the shipping carton, and mailed prepaid or hand-carried.
Page 45: Chapter 4: Bios
Chapter 4 BIOS Introduction This chapter describes the AMIBIOS™ Setup utility for the H8SSP-8/H8SSP-i. The AMI ROM BIOS is stored in a ﬂ ash chip and can be easily upgraded using a ﬂ oppy disk-based program. Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this manual.
Page 46: Advanced Settings Menu
H8SSP-8/H8SSP-i User's Manual Main Menu When you ﬁ rst enter AMI BIOS Setup Utility, you will see the Main setup screen. You can always return to the Main setup screen by selecting the Main tab on the top of the screen.
Page 47 Chapter 4: BIOS IDE Conﬁ guration Onboard PCI IDE Controller The following options are available to set the IDE controller status: Disabled will disable the controller. Primary will enable the primary IDE controller. There is no Secondary option since only one IDE slot is provided on the board. Primary IDE Master/Slave Highlight one of the two items above and press <Enter>...
Page 48 H8SSP-8/H8SSP-i User's Manual data transfer rate of 3.3 MBs. Select 1 to allow AMI BIOS to use PIO mode 1 for a data transfer rate of 5.2 MBs. Select 2 to allow AMI BIOS to use PIO mode 2 for a data transfer rate of 8.3 MBs. Select 3 to allow AMI BIOS to use PIO mode 3 for a data transfer rate of 11.1 MBs.
Page 49: Pci/Pnp Menu
Chapter 4: BIOS Floppy Conﬁ guration Floppy A Move the cursor to these ﬁ elds via up and down <arrow> keys to select the ﬂ oppy type. The options are Disabled, 360 KB 5 1/4", 1.2 MB 5 1/4", 720 KB 3½", 1.44 MB 3½”, and 2.88 MB 3½".
Page 50 H8SSP-8/H8SSP-i User's Manual PCI IDE BusMaster Set this value to allow or prevent the use of PCI IDE busmastering. Select "Enabled" to allow AMI BIOS to use PCI busmaster for reading and writing to IDE drives. The options are Disabled and Enabled.
Page 51 Chapter 4: BIOS Serial Port2 Address This option speciﬁ es the base I/O port address and Interrupt Request address of serial port 2. Select "Disabled" to prevent the serial port from accessing any system resources. When this option is set to "Disabled", the serial port physically becomes unavailable.
Page 52 H8SSP-8/H8SSP-i User's Manual Chipset Menu North Bridge Conﬁ guration Memory Conﬁ guration Memclock Mode This setting determines how the memory clock is set. Auto has the memory clock set by the code and Limit allows the user to set a standard value.
Page 53 Chapter 4: BIOS ECC Conﬁ guration DRAM ECC Enable DRAM ECC allows hardware to report and correct memory errors automati- cally. Options are Enabled and Disabled. MCA DRAM ECC Logging When "Enabled", MCA DRAM ECC logging and reporting is enabled. Options are Enabled and Disabled.
Page 54 H8SSP-8/H8SSP-i User's Manual HT2000 System I/O Conﬁ guration EXB_B Split to 2 (x4) Enable or Disable EXB_B Split to 2. EXB_C Split to 2 (x4) Enable or Disable EXB_C Split to 2. HT1000 SouthBridge Conﬁ guration HIDE XIOAPIC PCI Functions The options are Yes and No.
Page 55 Chapter 4: BIOS Headless Mode Select "Enabled" to activate the Headless Operation Mode through ACPI. The options are Enabled and Disabled. Event Log Conﬁ guration View Event Log Highlight this item and press <Enter> to view the contents of the event log. Mark All Events as Read Highlight this item and press <Enter>...
Page 56 H8SSP-8/H8SSP-i User's Manual HT2000: HT1000 HT Link Speed The HT link will run at the speed speciﬁ ed in this setting if it is slower than or equal to the system clock and if the board is capable. Options are Auto, 200 MHz, 400 MHz, 600 MHz and 800 MHz.
Page 57 Chapter 4: BIOS USB Conﬁ guration This screen will display the module version and all USB enabled devices. Legacy USB Support Select "Enabled" to enable the support for USB Legacy. Disable Legacy support if there are no USB devices installed in the system. The options are Enabled and Disabled.
Page 58 H8SSP-8/H8SSP-i User's Manual System Fan Monitor Fan Speed Control Modes This feature allows the user to determine how the system will control the speed of the onboard fans. If the option is set to "3-pin fan", the fan speed is controlled based upon the CPU die temperature. When the CPU die temperature is higher, the fan speed will be higher as well.
Page 59: Boot Menu
Chapter 4: BIOS Boot Menu Boot Settings Conﬁ guration Quick Boot If Enabled, this option will skip certain tests during POST to reduce the time needed for the system to boot up. The options are Enabled and Disabled. Quiet Boot If Disabled, normal POST messages will be displayed on boot-up.
Page 60 H8SSP-8/H8SSP-i User's Manual Boot Device Priority This feature allows the user to prioritize the sequence for the Boot Device with the devices installed in the system. The default settings (with generic names) are: · 1st Boot Device – Removeable drive (e.g. ﬂ oppy drive) ·...
Page 61: Security Menu
Chapter 4: BIOS Security Menu AMI BIOS provides a Supervisor and a User password. If you use both passwords, the Supervisor password must be set ﬁ rst. Change Supervisor Password Select this option and press <Enter> to access the sub menu, and then type in the password.
Page 62 H8SSP-8/H8SSP-i User's Manual Load Optimal Defaults To set this feature, select Load Optimal Defaults from the Exit menu and press <Enter>. Then Select "OK" to allow BIOS to automatically load the Optimal Defaults as the BIOS Settings. The Optimal settings are designed for maximum system performance, but may not work best for all computer applications.
Page 63: Appendix A: Bios Error Beep Codes
Appendix A: BIOS Error Beep Codes Appendix A BIOS Error Beep Codes During the POST (Power-On Self-Test) routines, which are performed each time the system is powered on, errors may occur. Non-fatal errors are those which, in most cases, allow the system to continue the boot-up process.
Page 64 H8SSP-8/H8SSP-i User's Manual Notes...
Page 65: Appendix B: Bios Post Checkpoint Codes
Appendix B: BIOS POST Checkpoint Codes Appendix B BIOS POST Checkpoint Codes When AMIBIOS performs the Power On Self Test, it writes checkpoint codes to I/O port 0080h. If the computer cannot complete the boot process, diagnostic equipment can be attached to the computer to read I/O port 0080h. Uncompressed Initialization Codes The uncompressed initialization checkpoint codes are listed in order of execution: Checkpoint...
Page 66 H8SSP-8/H8SSP-i User's Manual Bootblock Recovery Codes The bootblock recovery checkpoint codes are listed in order of execution: Checkpoint Code Description The onboard ﬂ oppy controller if available is initialized. Next, beginning the base 512 KB memory test. Initializing the interrupt vector table next.
Page 67 Appendix B: BIOS POST Checkpoint Codes Uncompressed Initialization Codes The following runtime checkpoint codes are listed in order of execution. These codes are uncompressed in F0000h shadow RAM. Checkpoint Code Description The NMI is disabled. Next, checking for a soft reset or a power on condition. The BIOS stack has been built.
Page 68 H8SSP-8/H8SSP-i User's Manual Checkpoint Code Description Interrupt vector initialization is done. Clearing the password if the POST DIAG switch is on. Any initialization before setting video mode will be done next. Initialization before setting the video mode is complete. Conﬁ guring the mono- chrome mode and color mode settings next.
Page 69 Appendix B: BIOS POST Checkpoint Codes Checkpoint Code Description The memory below 1 MB has been cleared via a soft reset. Clearing the memory above 1 MB next. The memory above 1 MB has been cleared via a soft reset. Saving the memory size next.
Page 70 H8SSP-8/H8SSP-i User's Manual Checkpoint Code Description The password was checked. Performing any required programming before WIN- BIOS Setup next. The programming before WINBIOS Setup has completed. Uncompressing the WINBIOS Setup code and executing the AMIBIOS Setup or WINBIOS Setup utility next.
Page 71 Appendix B: BIOS POST Checkpoint Codes Checkpoint Code Description Returned from adaptor ROM at E000h control. Performing any initialization required after the E000 option ROM had control next. Initialization after E000 option ROM control has completed. Displaying the system conﬁ guration next. Uncompressing the DMI data and executing DMI POST initialization next.
Page 72 H8SSP-8/H8SSP-i User's Manual Notes...

This manual is also suitable for:

H8ssp-i

Supermicro H8SSP-8 User Manual

Chapter 1: Introduction

Chapter 2: Installation

Chapter 3: Troubleshooting

Chapter 4: BIOS

Appendix A: BIOS Error Beep Codes

Appendix B: BIOS POST Checkpoint Codes

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