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3.3 Synchronous DMA transfer
3.3.1 Signal line definitions
Some existing ATA signal lines are redefined during the Synchronous
DMA protocol to provide new functions. If the Synchronous DMA transfer
mode was previously chosen by the Set Features, the ATA lines change
from the old to new definitions as soon as the host allows for a DMA
burst. The drive detects this change when the –DMACK line is asserted.
These lines revert back to their original definitions upon the deassertions
of –DMACK at the termination of the DMA burst.
Pin
New Definitions
21
DMARQ
29
–DMACK
–DMACK
27
25
STROBE
25
27
23
STOP
Note. DMARQ and –DMACK signal lines remain unchanged. This en-
sures backward-compatibility with PIO modes.
3.3.2 Protocol rules
The general rules of the Synchronous DMA Transfer Protocol are as
follows:
• A DMA burst is defined as the period from an assertion of –DMACK
to subsequent deassertion of –DMACK.
• A receiver must be prepared to receive at least two words of data
whenever it enters or resumes a burst mode.
• During the entire burst, –CS0, –CS1 and –IOCS16 are in the high
negated state. DA2, DA1 and DA0 are driven low.
• The drive begins driving and stops tristating IORDY when –DMACK
is first asserted and SyncDMA is enabled. The drive must continue to
Medalist 2520 Product Manual, Rev. A
Signal Line Definitions
Old Definitions
DMARQ
–DMACK
IORDY on write commands
–DIOR on read commands
–DIOR on write commands
IORDY on read commands
–DIOW
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