Table 43: Eeprom Data For Default Ethernet Operation; Figure 5: Cs8900A Serial Eeprom Configuration Sequence - Cirrus Logic CL-PS7500FE Hardware User's Manual

CL-PS7500FE Development Kit – Hardware User's Guide

Figure 5: CS8900A Serial EEPROM Configuration Sequence

Following the above flow chart, and noting that the "issue write command" step involves setting the address in the
EEPROM being written to, write the following sequence to the EEPROM:
Data
0x0000:A112
0x0000:2020
0x0000:0300
0x0000:0000
0x0000:0000
0x0000:2158
0x0000:0010
0x0000:0000
0x0000:0000
0x0000:8100
0x0000:FFFF
In the above table, the individual address data is the unique IEEE Ethernet address assigned to the specific
development board. The EEPROM on the development board has been pre-burned with a unique IEEE Ethernet
address assigned by Cirrus Logic.
March 1999

Table 43: EEPROM Data for Default Ethernet Operation

Write cmd Description
0x0000:0100 Configuration Word.
presence of EEPROM, plus the number of words in
configuration sequence.
0x0000:0101 I/O interface info
0x0000:0102 I/O base address
0x0000:0103 Interrupt
0x0000:0104 DMA channel
0x0000:0105 Individual address data
0x0000:0106 Ethernet address half word #0 (fake value shown here)
0x0000:0107 Ethernet address half word #1 (fake value shown here)
0x0000:0108 Ethernet address half word #2 (fake value shown here)
0x0000:0109 Checksum: 2's complement of the sum of the all bytes
of data written, ignoring carries. When added to the
sum, result should be zero.
0x0000:010A End of data flag
Contains flag indicating
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