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+B
R45
1K
R46
1K
R47
1K
C50
0.1
R38
33K
C34
0.033
R37
R36
47K
47K
C32
R34
27P
1K
R32
56K
R35
C31
470
0.0027
5
D2
1SS133
+5V
R54
K
NS702
1 2
5 6 7 8 4 9
11
10
TO DISPLAY PWB
P31 8-G
7
C22
R60
0.01
1K
+B
64
63
62
61
60
59
58
DEF1
1
R18
2
TA1
3.3M
PDO
3
C41
R58
0.047
680
4
VVSS
ISET
5
C42
0.047
VCO CLOCK
R57
OSC CONTROL
27K
6
VVDD
R56
FR
7
1.2K
VSS
8
EFMO
9
SLICE LEVEL
EFM DEMODULATE
EFMIN
CONTROL
10
TEST2
11
CLV+
12
CLV
CLV–
DIGITAL SERVO
13
V/P
14
HLF
15
SERVO
TES
COMMAND
16
11
17 18 19 20 21 22 23
C59
0.022
+B
IC91
TA7291S
LOADING MOTOR DRIVER
1 2 3 4 5 6 7 8 9
R97
R701
2.2K
100/10
15K
FM/AM(KHz)
SW725
R703
50/9
SPAN
23K
SELECTOR
C95
0.001
19
TO MAIN PWB(1/3)
CNS703
P25 12-E
11
8
Figure 27 SCHEMATIC DIAGRAM (5/11)
IC2
LC78622K
SERVO/SIGNAL
CONTROL
57
56
55
54
53
52
51
50
49
EFLG
U-COM
SBSY
SUB-CODE
INTERFACE
XVSS
XIN
X-TAL
XOUT
GENERATOR
2KX8
RAM
XVDD
MUTER
RVDD
ERROR COERECT
RCHO
FLAG CONTROL
1BIT
4FS
RVSS
DAC
DIGITAL
FILTER
LVSS
LCHO
SYNC-DETECT
LVDD
MUTEL
TEST4
DIGITAL
EXTERNAL
OUT
OUTPUT
24 25 26 27 28 29 30 31
32
D_GND
Q91
KTA1271 Y
+B
Q93
R96
KRC102 M
10K
3
2
R95
1
2.2K
R98
10K
CNS703
3
10
TO DISPLAY PWB
TO DISPLAY PWB
P31 8-G
P31 8-G
9
10
– 27 –
MAIN PWB-A1(2/3)
CD SIGNAL
+B
XL1
48
16.93MHz
47
46
45
44
43
42
+B
R74
41
2.7K
40
C70
C68
39
220P
10/16
C67
C69
38
10/16
220P
37
R73
36
2.7K
35
C43
100/10
34
33
D5
1SS133
R82
100
L1
2.7µH
+4.3V
D_5V (UCOM)
D81
1SS133
C51
C52
0.022
47/16
SOLM2
SOLENOID
LOCK
1
SOL
1
6
2
2
5
GND(M)
M3 T/T
+
3
3
4
M+
UP/DOWN
M
4
M–
4
3
LOADING
–
5
5
2
GND(D)
SW1
6
6
1
OPEN CLOSE
CLOSE/OPEN
7
DISC NO.
7
SENSOR PWB-E
8
8
GND(D)
9
MECHA UP
9
SW2
GND(D)
MECHA UP
10
10
1
1
2
2
SW3
CNS5
DISC NO.
CNS702
9
11
CD-C290X
CD_R
15
GND
16
A_GND
CD_L
17
C58
TO MAIN
+12V
PWB(3/3)
4
P28 2-D
(DRIVER)
TO MAIN
+5V
6
PWB(3/3)
P28 2-F
GND
TO MAIN
18
PWB (1/3)
D_GND
P25 12-E
+5V
TO MAIN
20
(SERVO)
PWB (3/3)
P28 2-F
12
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