ZiLOG Z08617 Manual page 23

INSTRUCTION SUMMARY (Continued)
Address Opcode
Instruction Mode
and Operation dst src
NOP
OR dst, src †
dst ← dst OR src
POP dst R
dst ← @SP;
IR
SP ← SP + 1
PUSH src R
SP ← SP – 1;
IR
@SP ← src
RCF
C ← 0
RET
PC ← @SP;
SP ← SP + 2
RL dst R
IR
C 7 0
RLC dst R
IR
C 7 0
RR dst R
IR
C 7 0
RRC dst R
IR
C 7 0
SBC dst, src †
dst ← dst
—
src – C
SCF
C ← 1
SRA dst R
IR
C 7 0
SRP src Im
RP ← src
Flags
Byte Affected
(Hex) C Z S V D H
FF – – – – – –
4[ ] – 0 – –
5 0 – – – – – –
5 1
7 0 – – – – – –
7 1
CF 0 – – – – –
AF – – – – – –
9 0 – –
9 1
1 0 – –
1 1
E0 – –
E1
C0 – –
C1
3[ ] 1
DF 1 – – – – –
D0 0 – –
D1
3 1 – – – – – –
Address Opcode
Instruction Mode
and Operation dst src
SUB dst, src †
dst ← dst – src
SWAP dst R
IR
7 4 3 0
TCM dst, src †
(NOT dst)
AND src
TM dst, src †
dst AND src
WDT
XOR dst, src †
dst ← dst XOR src
† These instructions have an identical set of addressing modes,
which are encoded for brevity. The first opcode nibble is found in
the instruction set table above. The second nibble is expressed
symbolically by a '[ ]' in this table, and its value is found in the
following table to the left of the applicable addressing mode pair.
For example, the opcode of an ADC instruction using the addressing
modes r (destination) and Ir (source) is 13.
Address Mode
dst src
r r
r Ir
R R
R IR
R IM
IR IM
®
Z08617 NMOS Z8 8-B MCU
IT
K C
EYBOARD ONTROLLER
Flags
Byte Affected
(Hex) C Z S V D H
2[ ] [ [ [ [ 1 [
F 0 X X – –
F 1
6[ ] – 0 – –
7[ ] – 0 – –
5 F – X X X – –
B[ ] – 0 – –
Lower
Opcode Nibble
[ 2 ]
[ 3 ]
[ 4 ]
[ 5 ]
[ 6 ]
[ 7 ]
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