ZiLOG Z08617 Manual page 15

FUNCTIONAL DESCRIPTION (Continued)
Watch-Dog Timer. The Z08617 is equipped with a hard-
ware Watch-Dog Timer which will be turned on automati-
cally by power-on (Figure 15). The Watch-Dog Timer must
be refreshed at least once every 50 ms by executing the
instruction WDT (Opcode = %5F), otherwise the Z08617
will reset itself if /WDTOUT pin 9 is connected to /RESET
(Pin 6). Figure 16 shows the block diagram of WDT.
The Watch-Dog Timer is automatically enabled upon
power-up of the microcontroller and /RESET going High.
The /WDTOUT pin can be connected to the /RESET pin to
provide an automatic reset upon WDT time-out. Dur-
VCC
/WDT
Output
/Reset
Internal
Reset
Reset
WDT
POR
* Reset Delay = POR 150 ms ±20%
Figure 15. WDT Turn-On Timing After Reset
10.4 Kohms
Reset Logic
Figure 16. WDT Block Diagram
ing WDT time-out, the /WDTOUT pin goes Low for
approximately 8-15 µs.
WDT Hot Bit. Bit 7 of the Interrupt Request Register
(IRR register FAH) determines whether a hot start or
cold start occurred. A cold start is defined as a rest
occurring from the power-up of the Z08617 (bit 7 is set to
zero upon power-up). A hot start occurs when a WDT time-
out has occurred (bit 7 is set to 1). Bit 7 of the IRQ register
is read-only and is automatically reset to 0 when accessed.
Power-On Reset. Upon power-up of the microcontroller,
a reset condition is enabled. A delay of 150 ms ± 20%
is used to assist in initializing the microcontroller.
8-15
µs
Reset
Delay
50 ms 150 ms
Counter
Internal RC
®
Z08617 NMOS Z8 8-B MCU
IT
K C
EYBOARD ONTROLLER
Internal
Reset
15