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6
JK85
D
CJJ4M069Z(GOLD)
C770
68
Z2 OUT
470/10V
R825
VGND
VGND
C806
0.01uF
C827
1/50V
0.01uF
C805
5
1
3
C
C826
1/50V
VCR
Y
4
2
C804
0.01uF
7
C825
1/50V
VGND
VGND
VGND
8
17
13
0.01uF
C803
9
11
C
Y
12
C824
1/50V
AV
10
C802
0.01uF
15
16
C823
1/50V
C801
0.01uF
VGND
C822
1/50V
VGND
VGND
VGND
5
0.01uF
C812
1
3
C
SAT
Y
4
C833
1/50V
2
C811
0.01uF
7
C
8
C832
1/50V
17
0.01uF
13
C810
9
11
C
Y
12
C831
1/50V
BD
VGND
VGND
VGND
10
C809
0.01uF
15
16
C830
1/50V
C808
0.01uF
VGND
C829
1/50V
C807
0.01uF
C828
1/50V
VGND
VGND
VGND
JK83
C813
0.01uF
Pr3
9
C771
1/50V
8
VGND
AV
C816
0.01uF
Pr2
7
VGND
C774
1/50V
VGND
0.01uF
C814
Pb3
VGND
6
C772
1/50V
5
VGND
C817
0.01uF
Pb2
VGND
4
C775
1/50V
VGND
0.01uF
C815
Y3
VGND
3
BD
C773
1/50V
B
2
VGND
C818
0.01uF
Y2
VGND
1
C776
1/50V
1,4,7 : UPPER
3,6,9 : LOWER
VGND
VGND
VGND
JK84
0.01uF
C819
Pr1
9
C766
1/50V
8
SAT
C765
VGND
VGND
75
Pr_OUT
7
R822
1000/6.3
VGND
0.01uF
C820
Pb1
6
C767
1/50V
5
C764
VGND
VGND
75
Pb_OUT
4
R823
1000/6.3
VGND
0.01uF
C821
Y1
3
C768
1/50V
2
VGND
VGND
75
Y_OUT
1
VGND
R824
1000/6.3
1,4,7 : UPPER
3,6,9 : LOWER
VGND
A
5
VIDEO PART
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
39
PORT0
23
Pr4
40
PORT1
22
+9VV
V+
41
Pr_OUT2
21
42
Y3
IC81
V+
20
43
VREF
NJW1321FP1
19
Pb3
44
DGND
18
V+
45
GND
17
Pr3
46
VGND
VGND
VGND
SDA
VGND
16
47
R831
Y2
SCL
15
R832
48
1
2
3
4
5
6
7
8
9
10
11
12
13
14
47K
R833
J1 J2
J3
J7
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
39
PORT0
23
40
Pr4
PORT1
22
+9VV
V+
41
Pr_OUT2
21
IC82
42
Y3
V+
20
43
NJW1321FP1
VREF
19
Pb3
44
DGND
18
V+
45
GND
17
Pr3
46
VGND
VGND
VGND
SDA
VGND
16
47
R834
Y2
SCL
15
R835
48
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VGND
Pr_OUT
Pb_OUT
Y_OUT
I2C BUS FORMAT
MSB
C763
S(1BIT)
SLAVE ADDRESS(8BIT)
SLAVE ADDRESS
MSB
1
0
CONTROL REGISTER TABLE
<WRITE MODE>
NO.
DATA 1
DATA 2
<READ MODE>
NO.
DATA
4
3
+5VV
VGND
8
7
6
5
VGND
VGND
1
2
3
4
VGND
VGND
C865
10/50V
33
33
VGND
VGND VGND
VGND VGND
+5VV
IC84 CVINJM2566V
R844
PS1
C841
1
S1
32
10K
S-C
SCIN
0.01uF
2
S2
31
C847
10/50V
V+1
3
30
SDCOUT
C858
75
NC-0
C853
4
29
0.1uF
SCOUT
R845
470/10V
MIXSW
C842
5
NC-3
28
C859
75
CVBS
VIN
0.01uF
6
VOUT
27
R846
470/10V
C848
10/50V
GND1
C843
7
V+4
26
C860
S-Y
75
SYIN
0.01uF
8
25
C855
SYOUT
0.1uF
R847
C849
10/50V
R841
470/10V
CBSW
C844
9
24
GND4
4.7K
C861
Y
75
YIN
0.01uF
10
YOUT
23
R848
470/10V
C850
10/50V
V+2
11
V+3
22
C862
75
NC-1
C854
12
PBOUT
21
C856
0.1uF
0.1uF
470/10V
R849
GND2
C845
13
20
NC-2
Pb
PBIN
0.01uF
14
19
GND3
C863
C851
10/50V
R842
75
PS2
C846
15
PROUT
18
10K
R850
R843
470/10V
Pr
PRIN
0.01uF
16
LPFSW
17
4.7K
C852
10/50V
VGND
33
33
* DEFINITION OF I2C REGISTER ( NJW1321 )
S : Starting Term
LSB
MSB
LSB
MSB
LSB
A : Acknowledge Bit
A(1BIT)
DATA(8BIT)
A(1BIT)
DATA(8BIT)
A(1BIT)
P(1BIT)
P : Ending Term
R/NOT W : Set the Write Mode or Read Mode.
Slave Address(8BIT)
MSB
Hex
ADR : Set the Slave Address by " ADR" terminal.
0
0
0
0
ADR(1BIT)
R/NOT W(1BIT)
-
R/NOT W = 0 : WRITE MODE, ADR = 0/1 ; ADR=0 Hex:94(h), ADR=1 Hex:96(h)
R/NOT W = 0 : READ MODE, ADR = 0/1 ; ADR=0 Hex:95(h), ADR=1 Hex:97(h)
BIT
PS : POWER SAVE
D7
D6
D5
D4
D3
D2
D1
D0
=> PS = 1 ; POWER SAVE ON (MUTE), PS = 0 ; POWER SAVE OFF (OUT ON)
PS1
PS2
OUT1
OUT2
OUT : OUTPUT
AUX0
AUX1
AUX2
AUX3
AUX : AUXILIARY (CONTROL SIGNAL OUTPUT)
BIT
D7
D6
D5
D4
D3
D2
D1
D0
PORT0
PORT1
PORT2
PORT3
PORT : INPUT
2
L801
* LC74763M OPTION TABLE
+5VV
100UH
C871
C872
X801
X802
IC83
IC83
LC74763M
LC74763M
PAL
27P
27P
17.734
14.318
VSS
VGND
VGND
VGND
NTSC
27P
27P
14.318
X
VDD1
VGND
R871
Xin1
X801
SYNCDET
1K
17.734MHz(EU)
Xout1
L802
VCOOUT
5.6UH
HSYNCOUT
VCOIN
VGND
VGND
Xin2
X802
FC
VGND
VGND
14.318MHz
R872
VGND
VGND
Xout2
AMPOUT
R873
1K
VSYNCOUT
1K
AMPIN
C881
R874
OSD_CE1
VGND
VGND
notCS
1/50
6.8K
PDOUT
C882
R875
OSD_DA
SIN
1.5K
6800P
AMPIN
R876
OSD_CLK
SCLK
PDOUT
VGND
39K
C883
SECAM
SYNCIN
0.1/50
C884
not525/625
CVCR
56P
notNTSC/PAL
CVIN
VGND
VGND
not3.58/4.43
VDD2
VGND
notRST
CVOUT
Q802
VGND
KTC3875SY
VGND
VGND
VGND
470/10
COMPO OSD IN
+9VV
C889
C890
R881
COMPO OUT
1.2K
10/50
+5VV
Q801
VGND
VGND
KTA1504SY
VGND
VGND
OSD_CLK
OSD_CE1
8
9
10
11
12
13
14
IC86
VGND
7
6
5
4
3
2
1
IC86
VGND
SN74ACT0DR
OSD_DA
OSD_CE1
+15VV
+5VV
+9VV
IC89
IC88
CVIKIA1117S50
CVIKIA7809AF
CVD1N4003SRT
L803
L804
D802
2
Out In
3
3
OUT
IN
1
10uH
10uH
GND
1
2
VGND
REVISION
1
MODEL
MP
DESIGN
L.J.Y
10.11.17
1
D
C
J9
R887
1K
OSD_SDA
R888
1K
OSD_SCL
CN301
R889
1K
OSD_CE
+15VA
+15VV
-5VA
-5VA
VGND
OSD_H
SV_Y_THURE
SV_C_THURE
CVBS_THURE
VGND
COM_Y_THURE
COM_Pb_THURE
COM_Pr_THURE
VGND
COM_Y_CONV
COM_Pb_CONV
COM_Pr_CONV
VGND
B
1321_SCL
1321_SDA
OSD_DATA
OSD_CLK
OSD_CE
VGND
N.D
N.D
N.D
VGND
N.D
N.D
N.D
N.D
VGND
N.D
2
4
6
3
5
7
A
SCHEMATIC DIAGRAM
SHEET
AVR400
13
15
CHECK
APPROVE
DRAWING NO
2330SCDZ
L.J.H
S.H.S
(VIDEO)
1
10.11.17
10.11.17
3
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