Operation Notes - Texas Instruments TPSM846C24 User Manual

Operation Notes

4 Operation Notes
To operate the EVM, apply a valid input voltage from 4.5 V to 15 V. The output voltage can be set over
the range from 0.5 V to 2.0 V.
The Power Good (PGOOD) indicator of the EVM will assert high when the output voltage is within ±5% of
the programmed output voltage value. A 10-kΩ pullup resistor (R18) is populated between the PGOOD pin
and the 3V3 pin.
The TPSM846C24DEVM-007 is set-up to operate at 500 kHz. A clock circuit is present on the bottom of
the EVM. The clock circuit produces a 500 kHz, 50% duty cycle clock that feeds both devices. If another
switching frequency is required, R20 must be removed from the clock circuit on the bottom of the EVM
and an external clock must be connected to the EXT CLK test point. The external clock applied to EXT
CLK test point must be 2 × the required frequency. The device can be synchronized to an external clock
over the frequency range of 300 kHz to 1 MHz. Refer to
Output, 35-A Power Module
The TPSM846C24DEVM-007 includes both input and output capacitors. The EVM includes footprints for
adding additional input and output capacitors to the EVM. Adding additional capacitance will improve
transient response. The actual capacitance required will depend on the input and output voltage conditions
of the particular application, along with the desired transient response. Refer to the product data sheet for
further information on input and output capacitance and transient response.
Do not change jumper settings while the module is powered. Permanent
damage may occur.
4
TPSM846C24 70-A Parallel Operation Evaluation Module
for further information on synchronization.
CAUTION
Copyright © 2017–2018, Texas Instruments Incorporated
TPSM846C24 4.5-V to 15-V Input, 0.5-V to 2.0-V
SNVU570A – December 2017 – Revised June 2018
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