Philips LPC213 Series User Manual page 260

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Volume 1
Table 155:Pulse Width Modulator (PWM) register map .186
Table 156:PWM Interrupt Register (PWMIR - address
0xE001 4000) bit description . . . . . . . . . . . . .187
Table 157:PWM Timer Control Register (PWMTCR -
address 0xE001 4004) bit description . . . . . .188
Table 158:Match Control Register (MCR, TIMER0: T0MCR -
address 0xE000 4014 and TIMER1: T1MCR -
address 0xE000 8014) bit description . . . . . .189
Table 159:PWM Control Register (PWMPCR - address
0xE001 404C) bit description . . . . . . . . . . . . .190
Table 160:PWM Latch Enable Register (PWMLER - address
0xE001 4050) bit description . . . . . . . . . . . . .192
Table 161:ADC pin description . . . . . . . . . . . . . . . . . . . .193
Table 162:ADC registers . . . . . . . . . . . . . . . . . . . . . . . . .194
Table 163:A/D Control Register (AD0CR - address
0xE003 4000 and AD1CR - address
0xE006 0000) bit description . . . . . . . . . . . . .194
Table 164:A/D Data Register (AD0DR - address
0xE003 4004 and AD1DR - address
0xE006 0004) bit description . . . . . . . . . . . . .196
Table 165:A/D Global Start Register (ADGSR - address
0xE003 4008) bit description . . . . . . . . . . . . .196
Table 166:DAC pin description . . . . . . . . . . . . . . . . . . . .198
Table 167:DAC Register (DACR - address 0xE006 C000) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .198
Table 168:Real Time Clock (RTC) register map . . . . . . .201
Table 169:Miscellaneous registers . . . . . . . . . . . . . . . . .202
Table 170:Interrupt Location Register (ILR - address
0xE002 4000) bit description . . . . . . . . . . . . .203
Table 171:Clock Tick Counter Register (CTCR - address
0xE002 4004) bit description . . . . . . . . . . . . .203
Table 172:Clock Control Register (CCR - address
0xE002 4008) bit description . . . . . . . . . . . . .203
Table 173:Counter Increment Interrupt Register (CIIR -
address 0xE002 400C) bit description . . . . . .204
Table 174:Alarm Mask Register (AMR - address
0xE002 4010) bit description . . . . . . . . . . . . .204
Table 175:Consolidated Time register 0 (CTIME0 - address
0xE002 4014) bit description . . . . . . . . . . . . .205
Table 176:Consolidated Time register 1 (CTIME1 - address
0xE002 4018) bit description . . . . . . . . . . . . .205
Table 177:Consolidated Time register 2 (CTIME2 - address
0xE002 401C) bit description . . . . . . . . . . . . .205
Table 178:Time counter relationships and values . . . . . .206
Table 179:Time counter registers . . . . . . . . . . . . . . . . . .206
Table 180:Alarm registers . . . . . . . . . . . . . . . . . . . . . . . .207
Table 181:Reference clock divider registers . . . . . . . . . .208
Table 182:Prescaler Integer register (PREINT - address
0xE002 4080) bit description . . . . . . . . . . . . .208
Table 183:Prescaler Integer register (PREFRAC - address
0xE002 4084) bit description . . . . . . . . . . . . .208
User manual
Table 184:Prescaler cases where the Integer Counter reload
value is incremented . . . . . . . . . . . . . . . . . . . 210
Table 185:Recommended values for the RTC external
32 kHz oscillator C
Table 186:Watchdog register map . . . . . . . . . . . . . . . . . 213
Table 187:Watchdog operating modes selection . . . . . . 213
Table 188:Watchdog Mode register (WDMOD - address
0xE000 0000) bit description . . . . . . . . . . . . . 214
Table 189:Watchdog Timer Constatnt register (WDTC -
address 0xE000 0004) bit description . . . . . . 214
Table 190:Watchdog Feed register (WDFEED - address
0xE000 0008) bit description . . . . . . . . . . . . . 214
Table 191:Watchdog Timer Value register (WDTV - address
0xE000 000C) bit description. . . . . . . . . . . . . 214
Table 192:Flash sectors in LPC2131, LPC2132, LPC2134,
LPC2136 and LPC2138 . . . . . . . . . . . . . . . . . 221
Table 193:ISP command summary. . . . . . . . . . . . . . . . . 223
Table 194:ISP Unlock command. . . . . . . . . . . . . . . . . . . 223
Table 195:ISP Set Baud Rate command . . . . . . . . . . . . 223
Table 196:Correlation between possible ISP baudrates and
external crystal frequency (in MHz) . . . . . . . . 224
Table 197:ISP Echo command . . . . . . . . . . . . . . . . . . . . 224
Table 198:ISP Write to RAM command . . . . . . . . . . . . . 225
Table 199:ISP Read memory command. . . . . . . . . . . . . 225
Table 200:ISP Prepare sector(s) for write operation
command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 226
Table 201:ISP Copy command . . . . . . . . . . . . . . . . . . . . 226
Table 202:ISP Go command. . . . . . . . . . . . . . . . . . . . . . 227
Table 203:ISP Erase sector command . . . . . . . . . . . . . . 227
Table 204:ISP Blank check sector command . . . . . . . . . 228
Table 205:ISP Read Part Identification number
command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 228
Table 206:LPC213x Part Identification numbers . . . . . . 228
Table 207:ISP Read Boot code version number
command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 228
Table 208:ISP Compare command. . . . . . . . . . . . . . . . . 229
Table 209:ISP Return codes Summary . . . . . . . . . . . . . 229
Table 210:IAP Command Summary . . . . . . . . . . . . . . . . 231
Table 211:IAP Prepare sector(s) for write operation
command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 232
Table 212:IAP Copy RAM to Flash command . . . . . . . . 233
Table 213:IAP Erase sector(s) command . . . . . . . . . . . . 233
Table 214:IAP Blank check sector(s) command . . . . . . . 234
Table 215:IAP Read Part Identification command . . . . . 234
Table 216:IAP Read Boot code version number
command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 234
Table 217:IAP Compare command. . . . . . . . . . . . . . . . . 235
Table 218:Reinvoke ISP . . . . . . . . . . . . . . . . . . . . . . . . . 235
Table 219:IAP Status codes Summary . . . . . . . . . . . . . . 235
Table 220:EmbeddedICE pin description . . . . . . . . . . . . 238
Table 221:EmbeddedICE logic registers . . . . . . . . . . . . 239
Rev. 01 — 24 June 2005
UM10120
Chapter 24: Supplementary information
components . . . . . . . 211
X1/X2
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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