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Philips Semiconductors
Volume 1
After I2ADR and I2CONSET are initialized, the I
its own address or general address followed by the data direction bit. If the direction bit is
0 (W), it enters slave receiver mode. If the direction bit is 1 (R), it enters slave transmitter
mode. After the address and direction bit have been received, the SI bit is set and a valid
status code can be read from the Status register (I2STAT). Refer to
status codes and actions.
11.5.4 Slave Transmitter mode
The first byte is received and handled as in the slave receiver mode. However, in this
mode, the direction bit will be 1, indicating a read operation. Serial data is transmitted via
SDA while the serial clock is input through SCL. START and STOP conditions are
recognized as the beginning and end of a serial transfer. In a given application, I
operate as a master and as a slave. In the slave mode, the I
slave address and the general call address. If one of these addresses is detected, an
interrupt is requested. When the microcontrollers wishes to become the bus master, the
hardware waits until the bus is free before the master mode is entered so that a possible
slave action is not interrupted. If bus arbitration is lost in the master mode, the I
interface switches to the slave mode immediately and can detect its own slave address in
the same serial transfer.
User manual
S
SLAVE ADDRESS
From Master to Slave
From Slave to Master
Fig 24. Format of Slave Receiver mode
S
SLAVE ADDRESS
From Master to Slave
From Slave to Master
Fig 25. Format of Slave Transmitter mode
Rev. 01 — 24 June 2005
2
W
A
DATA
"0" - Write
"1" - Read
A = Acknowledge (SDA low)
A = Not acknowledge (SDA high)
S = START Condition
P = STOP Condition
RS = Repeated START condition
R
A
DATA
"0" - Write
"1" - Read
A = Acknowledge (SDA low)
A = Not acknowledge (SDA high)
S = START Condition
P = STOP Condition
UM10120
Chapter 11: I
C interface waits until it is addressed by
Table 122
A
DATA
Data Transferred
(n Bytes + Acknowledge)
2
C hardware looks for its own
A
DATA
Data Transferred
(n Bytes + Acknowledge)
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
2
C interfaces
for the
A/A
P/RS
2
C may
2
C
A
P
113
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