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System I/O address map (continued)
Hex address
A2E1
C2E1
E2E1
Connector Pin Assignments
Parallel port connector pin assignments (J1)
Pin 1 Signal
1
2 1 D a t a 0
3
4
5
6
7
8
I
Data 7
9
* Active LOW logic
Serial port connector pin assignments (J2 and J3)
A-14 Specifications
Assigned device
Available
Available
Available
Signal
Pin
ACK *
10
Busy
11
PE
12
13
Select
AFD *
14
Error *
15
lnit *
16
Selectin *
17
Signal ground
18
Pin
Signal
19
20
21
22
Signal ground
23
24
25
Signal ground
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