NEC mPD71312 User Manual page 52

(c) Transfer direction specification
In addition to the 7-bit address data, the master device sends 1 bit that specifies the transfer direction.
Since this I
When this transfer direction specification bit has a value of "0", it indicates that the master device is
transmitting data to a slave device. When the transfer direction specification bit has a value of "1", it indicates
that the master device is receiving data from a slave device.
(d) Acknowledge signal (ACK)
ACK is a signal for receiving serial data at the transmission and reception sides.
The reception side returns ACK each time it has received 8-bit data. To generate ACK, the reception side
makes the SDA line low at high level of the ninth clock on the SCL line.
The transmission side detects whether ACK has been received from the reception side after transmitting 8-bit
data. When ACK is returned, it is assumed that reception has been correctly performed and processing is
continued.
2
This I C bus has the following specifications.
When receiving:
When transmitting: By receiving an ACK, the next data is transmitted according to the SCL clock.
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CHAPTER 4 I
2
C bus only has a slave function, this bit is monitored to determine the transfer direction.
Figure 4-4. Transfer Direction Specification
SCL 1 2
SDA
AD6 AD5
In normal operation, an ACK is returned upon every data reception.
If the master does not receive an ACK, operation is judged as abnormal and a stop
condition must be issued or operation must be reset.
If an ACK is not received, transfer from the master is judged as completed and the SDA
line is released.
SCL 1 2
SDA
AD6 AD5
User's Manual U18438EJ2V0UD
2
C COMMUNICATIONS
3 4 5 6 7
AD4 AD3 AD2 AD1 AD0
Transfer direction specification
Figure 4-5. ACK
3 4 5 6 7
AD4 AD3 AD2 AD1 AD0
8 9
R/W
8 9
R/W ACK
Acknowledge signal