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Figure 3-3 shows the control register of LCD controller/driver and the memory map of display RAM, and Figure 3-4
shows the LCD display RAM.
Address
LCDCTL's 03H
LCDCTL's 00H
Address
LCDSEG's 27H
LCDSEG's 00H
Note 64-pin product only.
Remark Bits 4 to 7 are fixed to 0.
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CHAPTER 3 LCD CONTROLLER/DRIVER
Figure 3-3. Control Register of LCD Controller/Driver
Register
7
VLCG0
CTSEL1
02H
LCDC
0
01H
LCDM
LCDON
LCDMD
SEGSET2 SEGSET1 SEGSET0
7
6
Note
0
0
Note
0
0
26H
Note
0
0
25H
Note
0
0
24H
23H
0
0
22H
0
0
21H
0
0
20H
0
0
1FH
0
0
1EH
0
0
1DH
0
0
1CH
0
0
1BH
0
0
1AH
0
0
19H
0
0
18H
0
0
17H
0
0
16H
0
0
15H
0
0
14H
0
0
13H
0
0
12H
0
0
11H
0
0
10H
0
0
0FH
0
0
0EH
0
0
0DH
0
0
0CH
0
0
0BH
0
0
0AH
0
0
09H
0
0
08H
0
0
07H
0
0
06H
0
0
05H
0
0
04H
0
0
03H
0
0
02H
0
0
01H
0
0
0
0
6
5
4
0
0
CTSEL0
0
0
0
0
SCOC
VLCON
0
Figure 3-4. LCD Display RAM
Bit
5
4
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
↑
Common
COM3
User's Manual U18438EJ2V0UD
Bit
3
2
1
0
0
0
LCDC3
LCDC2
LCDC1
0
LCDM2
LCDM1
0
0
MDSET1 MDSET0
Segment
2
1
0
→ S39
→ S38
→ S37
→ S36
→ S35
→ S34
→ S33
→ S32
→ S31
→ S30
→ S29
→ S28
→ S27
→ S26
→ S25
→ S24
→ S23
→ S22
→ S21
→ S20
→ S19
→ S18
→ S17
→ S16
→ S15
→ S14
→ S13
→ S12
→ S11
→ S10
→ S9
→ S8
→ S7
→ S6
→ S5
→ S4
→ S3
→ S2
→ S1
→ S0
↑
↑
↑
COM2
COM1
COM0
0
GAIN
LCDC0
LCDM0
Note
Note
Note
Note
21
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