Troubleshooting Guide Overview This troubleshooting guide is divided into three sections. The section that you use will be determined by the items available to you for use in troubleshooting. Section 1 allows for limited troubleshooting due to limited availability of items. Section 3 is the most complete troubleshooting section.
Table of Contents (continued) Troubleshooting Procedures ....................44-57 Figure 28. 25 Pin to 9 Pin Serial Data Cable...................44 Figure 29. DSP PCB Test Point Locations Layout Diagram, Solder Side ........44 Figure 30. Scope Photo of Boot Prompt at J5 Pin 11..............47 Figure 31.
Test Set-up Parameters and Equipment Use the disassembly/assembly procedures found in the AM25/30P Series II service manual part number 230-90374.921, to access the PCBs. Speaker Output Loading: Unless testing the amplifier for its rated power output, all tests are to be performed with the speaker outputs unloaded.
Bass Box Only Test Procedures 2.2 Check for AC mains voltage, 120 or 240 VAC at the transformer primary. If there is voltage at the transformer primary, remove AC mains power and check the thermal fuse in the transformer primary. Replace the transformer if the internal fuse is open. If there is no voltage at the transformer primary, proceed as follows.
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Bass Box Only Test Procedures 4. Microprocessor Circuit Check 4.1 The serial data output leaves the DSP PCB at J5 pin 11 (U202 pin 43, signal name “TTY OUT”) and the boot prompt can be checked here at power-up with an oscilloscope. The first thing the uC is supposed to do when it comes out of reset is to print the following to the “debug”...
Amplifier PCB Hook-Up Procedures This procedure will allow you to connect and operate the amplifier PCB by itself, with no DSP board connected. This will enable you to determine whether the amplifier PCB or the DSP PCB is defective. If you can turn the the amplifier PCB on, and perform the test procedures later in this section, then the amplifier PCB should be fine and the DSP board is most likely at fault.
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Amplifier PCB Hook-Up Procedures Figure 4. Input Wire Connection View at J700 1. Remove the top cover assembly using the disassembly/assembly procedures located in the service manual part number 90374.921. The first PCB board you see is the DSP PCB (it has a shield on it).
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Amplifier PCB Hook-Up Procedures 3. Jumper point A to point B on the PCB as shown in Figure 5 below. Point A is the fuse clip and Point B is J7 pin 1. There are two versions of the Triac, one is a through hole device and the other is a surface mount device.
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Amplifier PCB Hook-Up Procedures Input Connector Table J700 Description Note Pin 1 Not used Pin 2 Logic signal +5Volts Pin 3 Logic signal +5Volts Pin 4 Logic signal +5Volts Pin 5 Left and right audio return Pin 6 Right surround audio input Pin 7 Left surround audio input Pin 8...
Amplifier Test Procedures Note: Unless you are testing the amplifier for its rated power output, all tests are to be performed with the speaker outputs unloaded. The amplifier can be tested with loads as long as the PCB is still mounted in its heatsink. Speaker Load Table Output Location...
DSP PCB Troubleshooting Procedures DSP PCB Troubleshooting Procedure Setup 1. Remove all test cables used in the amplifier test procedures, if necessary, and reassemble the electronics module, leaving the top cover off. Refer to the Digital Bass Box service manual, Loewe part number 90374.921 for disassembly/assembly procedures.
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DSP PCB Troubleshooting Procedures 2.2.1 At the input side to the +5V regulator U1. This is a typical 7805 3-terminal linear regulator, so it needs at least 7.5V at the input to stay in regulation. If there is +17V at J8 pin 3, but no voltage at the input side of U1, check the components in between (R10 and R11, large SMD resistors on the bottom side).
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DSP PCB Troubleshooting Procedures 2.4.3 Check that U500 pin 11 is connected to ground. This pin is U500’s ENABLE input; if it isn’t grounded, U500 shuts down. 2.4.4 Check that the base of Q500 (bottom side) or U202 pin 41 (same node) is pulled to ground. If Q500 is turned on, U500 shuts down.
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DSP PCB Troubleshooting Procedures 2.5.4 Output data, U100_36: “irregular” digital activity at R187, similar to Figure 44. 2.6 Codec Revision Code The CS4226 codecs must be rev. G or higher. Specifically, the rev. code must NOT be “C”. The rev. letter is the letter immediately preceding the date code silkscreened on the IC, e.g. CRYSTAL (logo) CS4226-KQ EP (part number 90371.968) JTAAXG9819 (rev.
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DSP PCB Troubleshooting Procedures 2.10 5V / 3.3V Level Translators The micro (U202) and the codec (U100) run on +5V, while the DSPs run on 3.3V. There are a couple of level-translator ICs required to bridge this gap: U101, a 74LCX244, a 3.3V part which has “5V tolerant” inputs. U102, a 74ACT244, a 5V part with input logic thresholds that are compatible with 3V logic (“TTL”, or 0.8V/1.5V).
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DSP PCB Troubleshooting Procedures 2.11 Evidence that the DSPs have booted 2.11.1 DSP Output Ports Observe the following signals as the power to the PCB comes up: U102_15 U102_11 These signals are part of the communications buss between each DSP and the microcontroller, and are pulled up to +3.3V by resistors.
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DSP PCB Troubleshooting Procedures Figure 8. DSP PCB Test Point Locations Layout Diagram, Solder Side...
Scope Photos The bass module is muted when it is first powered up and will not un-mute until it receives an “un-mute” or “volume up” command. Muted data consists of all zeroes; this condition is shown in the lower trace of the codec (U100) scope photo, mute condition.
Scope Photos Figure 10. Microcontroller (U202) Scope Photo, Power Up Upper trace: RESET pulse (active low), U202 pin 14 or U200 pin 2 Middle trace: +5V supply Lower trace: Serial data from uC, J5 pin 11 The first thing the microcontroller supposed to do when it comes out of reset is to print the following to the debug output J5 pin 11.
Section 2 Bass Module with Head Unit Procedures Section 2 Contents Section 2, Bass Module with Head Unit Procedures .............. 22-41 Normal System Operation Description ..................23 Test Setup Procedures ........................24 Connection of Bass Module Using a CD-5/CD-20 Music Center ..........24 Bass Box Troubleshooting Procedures ...................
(two chimes) (see explanation table on the next page) using the STEREO two- speaker button. Simulated Surround for Mono Movie Material Bose ® Videostage decoding can process a one-channel program into five-speaker sound directing the signals so that dialogue remains locked on-screen, while music and ambient effects fill the room.
Connection of Bass Module Using a CD-5/CD-20 Music Center Test Setup Procedures Connect the input cable, part number, (90374.978 for the CD-20) or (90375.934 for the CD-5) to the music center and the bass module. Connect the power supply to the music center and the line cord to the bass module.
Bass Box Troubleshooting Procedures 1. Check for Voltage at the Transformer 1.1 With the bass module completely assembled and the cover off, check for voltage at the trans- former secondary. If there is voltage at the transformer secondary, skip to procedure 3. If there is no voltage on the transformer secondary, continue on to step 1.2.
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Bass Box Troubleshooting Procedures Note: Refer to Figure 15. DSP PCB Test Point Locations Layout Diagram, Solder Side on page 34 for the following procedures. 3. Microprocessor Circuit Check 3.1 The serial data output leaves the DSP PCB at J5 pin 11 (U202 pin 43, TTY OUT) and the boot prompt can be checked here at power-up with an oscilloscope.
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Bass Box Troubleshooting Procedures 4. No Audio at Speaker Outputs 4.1 If there is no audio from the speaker outputs when an analog signal is applied to the input of the bass module, follow the audio signal path through the system. Refer to the following table. If there is audio from the speaker outputs when an analog signal is used but not when a SPDIF (Sony/Philips Digital Interface Format) signal is used, go to procedure 5.
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Bass Box Troubleshooting Procedures 5.4 Capture the PLL tuning voltage as it goes from 0V (analog mode) to about 2V (digital mode). Voltage should slew and settle within about 5 msec. Any AC on the tuning line after the initial 10 msec, indicates a stability problem with the PLL circuit.
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Bass Box Troubleshooting Procedures 7.2.2 At the output side of the +5V regulator. Check that the +5V output is clean and that the regulator is not oscillating. The regulated +5V is supplied to the rest of the PCB via a couple of filter components, so check for +5V at the following points: 7.2.3 U102 pin 20;...
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Bass Box Troubleshooting Procedures 7.4.5 100 KHz switching waveform, Figure 40, on the +17V side of the toroidal inductor L500. This waveform should switch rapidly (<100 nsec) between about -0.35V and VCC, with an aver- age DC voltage of 3.3V. If the voltage at this node dips well below -0.35V, then check D500 (bottom side).
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Bass Box Troubleshooting Procedures 7.6.2 DC bias at U100 pins 13 and 14: 2.3V If you don’t see any signal at the codec inputs, trace the analog signal path through from J5 (sheet 1 of schematic) to figure out where it disappears. Also, check the ± 12V power supplies on the op-amps.
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Bass Box Troubleshooting Procedures Output from U106: 7.10.3 U106 pin 13: 100 nsec pulse, at 44.1 KHz rate 7.11 5V / 3.3V Level Translators The micro (U202) and the codec (U100) run on +5V, while the DSPs run on 3.3V. There are a couple of level-translator ICs required to bridge this gap: U101 a 74LCX244, a 3.3V part which has “5V tolerant”...
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Bass Box Troubleshooting Procedures 7.12 Evidence that the DSPs have booted 7.12.1 DSP Output Ports Observe the following signals as the power to the PCB comes up: U102_15 U102_11 These signals are part of the communications buss between each DSP and the microcontroller, and are pulled up to +3.3V by resistors.
Scope Photos Figure 16. Codec (U100) Scope Photo, Un-mute Condition Upper trace: LR_CLK (U100 pin 37) 44.1 kHz square wave Middle trace: SDOUT1 (U100 pin 36) serial data out Lower trace: SDNIN1 (U100 pin 34) serial data in For each period of the 44.1 KHz clock, there are 256 bits of data clocked in/out. The first bit of the data stream starts at the falling edge for LRCLK.
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Scope Photos On the lower trace of Figure 16, you can see the six packets of audio data embedded in the bit stream. The bass module is muted when it is first powered up and will not un-mute until it receives an “un-mute”...
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Scope Photos Figure 18. Microcontroller (U202) Scope Photo, Power Up Upper trace: RESET pulse (active low), U202 pin 14 or U200 pin 2 Middle trace: +5V supply Lower trace: Serial data from uC, J5 pin 11 The first thing the microcontroller supposed to do when it comes out of reset is to print the following to the debug output J5 pin 11.
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Scope Photos Figure 19. SPDIF Signal at U100 pin 42 Upper trace: Detail Lower trace: SPDIF signal at the codec’s SPDIF input (U100 pin 42) Figure 20. Microcontroller 8 MHz clock at U202 pin 39...
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Scope Photos Figure 21. Codec 11.2896 MHz Clock Upper trace: Signal at CR100 crystal (U100 pin 29) Lower trace: Buffered digital SCLK output (U100 pin 38) This is the bit clock used to clock serial data in/out of the codec (see Codec (U100) Scope Photo, Un-mute condition and Codec (U100) Scope Photo, Mute condition) Figure 22.
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Scope Photos Figure 23. 3.3V Switching Power Supply Signals Upper trace: U500 pin 1 Lower trace: U500 pin 2 The 100 kHz pulse train developed at U100 pin 2 (the lower trace) is applied to the output filter L500/C500. The average DC voltage of this pulse train is 3.3V, which can be found on the other side of L500.
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Scope Photos Figure 25. Transmit Frame Sync Figure 26. Serial Data Clock Figure 27. Audio Data The audio serial data transmitted from DSP1 to DSP2 is sent via a high speed serial link, which requires 3 signals to operate. Serial Data Clock: This clock will either be 40 MHz (older software revision) or 20 MHz (version 30 and above).
Number Number RS232 to TTL converter 232 TTL Power Supply for RS232 232 PS 25 to 9 Pin PC serial port cable 254858 Bose SPDIF Digital Signal Converter 10050 Fl-Calf Test Cabl 199527 Bose Test Setup Procedure (see Figure 45. Test Setup Diagram, located in the Appendix) Using the test cable, part number 199527, plug the 13-pin din connector into the bassbox.
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Troubleshooting Procedures data to bassbox data from To PC bassbox COM port 25-pin D connector on test cable 199527 25-socket 9-socket D connector D connector B+B Model 232TTL logic level shifter Figure 28. 25 Pin to 9 Pin Serial Data Cable Figure 29.
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Troubleshooting Procedures Note: Refer to Figure 29. DSP PCB Test Point Locations Layout Diagram, Solder Side for the following procedures. 1. Check for a Boot Prompt 1.1 With the module completely assembled and the cover removed, connect the the line cord to an AC mains source and connect the 9 Volt battery to the 3.5 mm mono plug located on the test cable.
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Troubleshooting Procedures 2.2 Check for AC mains voltage, 120 or 240 VAC, at the transformer primary. If there is voltage at the transformer primary, check the thermal fuse in the transformer primary and replace the transformer if it is open. If there is no voltage at the transformer primary, proceed as follows.
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Troubleshooting Procedures 4. Microcontroller Circuit Check 4.1 The serial data output leaves the DSP PCB at J5 pin 11 (U202 pin 43, TTY OUT) and the boot prompt can be checked here at power-up with an oscilloscope. The first thing the uC is supposed to do when it comes out of reset is to print the following to the “debug”...
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Troubleshooting Procedures 5. Boot Prompt Returned with an Error Code 5.1 Connect AC mains voltage to the bass box, and then connect the 10V turn-on signal to the 3.5 mm mono plug located on the test cable. Wait at least 5 seconds for error codes to appear. Refer to the following table for an explanation of the error codes.
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Troubleshooting Procedures 6. Boot Prompt Okay, No Error Codes 6.1 Check the software revision by entering the TAP command “tv” into the computer. You do this by typing the command in the terminal window and pressing the ENTER key. The modules response will show up in the terminal window.
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Troubleshooting Procedures 8. No Audio at Speaker Outputs 8.1 If there is no audio from the speaker outputs when an analog signal is applied to the input of the bass module, follow the audio signal path through the system. Refer to the following table. If there is audio from the speaker outputs when an analog signal is used but not when a SPDIF (Sony/Philips Digital Interface Format) signal is used, go to procedure 9.
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Troubleshooting Procedures 9.2 Check SPDIF signal path (Figure 54); J5 pin 4 U100 pin 42 (if codec is in digital mode there should be 2.3 VDC on pin 42). 9.3 Verify the DC voltage on the PLL line is clean; indicates that the PLL has locked onto the SPDIF signal.
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Troubleshooting Procedures 11.2 +5V Supply Check the +5V supply first, since the +5V powers the micro and without the micro, nothing else works. Check the following points: 11.2.1 At the input side to the +5V regulator U1. This is a typical 7805 3-terminal linear regulator, so it needs at least 7.5V at the input to stay in regulation.
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Troubleshooting Procedures 11.4.1 +17V on both sides of the surface-mount inductor L501 (top side). 11.4.2 5.1 VDC at U500 pin 18. This is a reference voltage generated by U500. Its presence here on pin 18 will show that U500 is getting power. 11.4.3 Check that U500 pin 11 is connected to ground.
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Troubleshooting Procedures Once the micro boots, there is a fair amount of regular activity on these two lines. The micro checks the codec’s error status register about every 5 msec , so if these lines are silent, suspect a bad micro or a broken connection somewhere between the micro and the codec. Also, the micro will output an error code if it detects an on going problem with the I 2 C.
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Troubleshooting Procedures In this case, it’s ugly, but it’s not a serious issue — all you’re trying to do is verify that the clock is oscillating. However, pay attention to the frequency — this is a third overtone oscillator, which means it may prefer to oscillate at 13.333 MHz (40/3).
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Troubleshooting Procedures From the codec U100 to DSP1: (See Figure 31 below) U101_13 —> U101_7 U101_15 —> U101_5 U101_17 —> U101_3 From DSP1 to the codec U100 U102_2 —> U102_18 U102_4 —> U102_16 5V 3V DSP1 DSP2 U100 TCLK1 RCLKO TCLKO RCLK1 SDIN1...
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Troubleshooting Procedures 11.12 Evidence that the DSPs have booted 11.12.1 Error codes Check for the absence of any error codes following the boot prompt. Error codes in the teens or twenties (e.g., “—12++” or “—22++”) indicate that the micro is having trouble communicating with either DSP.
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Scope Photos Figure 33. Codec (U100) Scope Photo, Un-mute Condition Upper trace: LR_CLK (U100 pin 37) 44.1 kHz square wave Middle trace: SDOUT1 (U100 pin 36) serial data out Lower trace: SDIN1 (U100 pin 34) serial data in For each period of the 44.1 KHz clock, there are 256 bits of data clocked in/out. The first bit of the data stream starts at the falling edge for LRCLK.
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Scope Photos On the lower trace of Figure 33, you can see the six packets of audio data embedded in the bit stream. The bass module is muted when it is first powered up and will not un-mute until it receives an “un-mute”...
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Scope Photos Figure 35. Microcontroller (U202) Scope Photo, Power Up Upper trace: RESET pulse (active low), U202 pin 14 or U200 pin 2 Middle trace: +5V supply Lower trace: Serial data from uC, J5 pin 11 The first thing the microcontroller supposed to do when it comes out of reset is to print the following to the debug output J5 pin 11.
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Scope Photos Upper trace: Detail Lower trace: SPDIF signal at the codec’s SPDIF input (U100 pin 42) Figure 36. SPDIF Signal at U100 pin 42 Figure 37. Microcontroller 8 MHz clock at U202 pin 39...
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Scope Photos Upper trace: Signal at CR100 crystal (U100 pin 29) Lower trace: Buffered digital SCLK output (U100 pin 38) This is the bit clock used to clock serial data in/out of the codec (see Codec (U100) Scope Photo, Un-mute condition and Codec (U100) Scope Photo, Mute condition) Figure 38.
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Scope Photos Upper trace: U500 pin 1 Lower trace: U500 pin 2 The 100 kHz pulse train developed at U100 pin 2 (the lower trace) is applied to the output filter L500/C500. The average DC voltage of this pulse train is 3.3V, which can be found on the other side of L500.
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Scope Photos Figure 42. Transmit Frame Sync Figure 43. Serial Data Clock Figure 44. Audio Data The audio serial data transmitted from DSP1 to DSP2 is sent via a high speed serial link, which requires 3 signals to operate. Serial Data Clock: This clock will either be 40 MHz (older software revision) or 20 MHz (version 30 and above).
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Appendix Computer Setup Procedure Use this procedure to configure your IBM compatible PC for communication with the digital bass module. 1. Open a terminal window, as shown at right, in either Terminal or Hyperterm, as applicable for the version of Microsoft ®...
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Appendix Computer Setup Procedure (continued) 4. In the Test Properties dialog box, click on the Settings tab and set the controls as shown in the example at right. Note: Be sure to check “Beep three times when connecting or disconnecting”. 5.
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Appendix Computer Terminal Window Example Screens Module Turn-on Boot Prompt At turn-on, the module will send the information shown in the window at right to the terminal window on your computer. In this case, the response from the module tells you that the DSPs have booted (**) and that the module has received an OFF command from the head unit six...
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SPDIF ADC output or DVD Player or PC soundcard 75 Ohm Digital Bass Digital Input Box Test cable Female RCA Cable, Bose P/N: 199527 B+B RS-232 adapter 9 pin connector to PC serial port RS-232 Digital Bass Box 25 pin D-sub connector...
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Appendix To/from Head Unit L in/R in SPDIF in SmartSpeaker in Turn-on TTY Debug out to PC Line- 13 pin DIN cord Fuse Digital Turn-on DSPs Triac RCA Output J9-J11 connectors Analog Audio to satellite to Amps speakers Primary 8 Conductor 18 Conductor Transformer gray cable...
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Appendix Serial Data I/O 8 MHz from head unit crystal 5 Vdc EEPROM Serial I/O to DSPs CODEC Linear P/S buffers +17Vdc EEPROM 3.3 Vdc DSPs buffers SMPS I C buss EPROM 11.2896 MHz crystal +12v DSP1 DSP2 Stereo SPDIF SPDIF Digital Digital Input...
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Appendix +12v D301 BAV99L J5-7 Q300 V10v D300 Turn-on 3.3V R310 Voltage R311 R305 5.1k Q301 R306 100k U300 To Triac gate C314 .001 Opto-coupler Crow-bar latching circuit R307 C308 "ON" state: (Crowbar OFF) Q303 off, Q302 off Q303 voltage at U300-1 about 1.25v = Vf of IR LED.
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Appendix +5v Regulator 7805 TP221 Uc Basics Bead 1. +5v L200 2. 8 MHz clock 3. reset signal 250msec If you are missing any TP265 one of these three, the micro will not boot. C207 See Figure 37 See Figure 35 Boot prompt should issue TP231 immediately at power-up...
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Appendix +12V Diode clamps to prevent Op-amp (+/-12V) from R100 R100 R107 Signal damaging CODEC (+5V) 2.3Vdc bias from CODEC Analog Input +12V R103 Blocking R104 ref. U100 -12V Codec U105 D103 Input +12V C104 10uF/25V -12V R100 R100 No DC here This cap prevents RFI from...
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Appendix 2.3v + signal DSP PCB Ribbon Cable Amplifier PCB RFI Filter U100 CODEC U103 Analog Power Outputs (x6) J700 8 Ohm Speaker 6x Signal No DC CODEC Ground 2.3VDC Referenced to Amplifier GND Amp Ground Figure 55. Analog Signal Path from CODEC to Satellite Simplified Schematic Diagram Thermal Fuse in contact with transformer...
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Appendix 12 and 25 Series II Overall Frequency Response Curve ® Figure 58. Lifestyle Speaker EQ cricketcube. Sample rate: 48000. Solid=Analog. Dashed=Digital. Frequency (Hz) 30 Series II Overall Frequency Response Curve ® Figure 59. Lifestyle...
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Appendix Tone control for sample rate 48000 1.000000 0.750000 0.500000 0.250000 0.000000 −0.250000 −0.500000 −5 −0.750000 −10 −15 −1.000000 −20 Frequency (Hz) Series II Tone Control Frequency Response Curve ® Figure 60. Lifestyle Series II Film EQ Frequency Response Curve Figure 61.
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Appendix Series II Dynamic EQ Frequency Response Curve Figure 62. Lifestyle ® European bass control response −1.000000 −0.750000 −0.500000 −0.250000 0.000000 0.250000 0.500000 0.750000 1.000000 −5 −10 −15 Frequency (Hz) Series II 240 Volt Bass Frequency Response Curve ® Figure 63. Lifestyle...
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Appendix SPDIF Sony/Philips Digital Interface Format (SPDIF). A common format for sending 24-bit, two channel digital audio down a single coax cable (or twisted pair, or optical fiber). The SPDIF signal can also carry Dolby Digital data instead of a stereo signal. The Dolby Digital data is highly compressed, thus lowering the required bit rate for 5-channel surround, which is how a system designed to carry two-channel data can be used to carry more than two channel’s of audio.
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Appendix TAP Commands (continued) TAP Command Description ad x print uC ADC port voltage, where "x" equals: bass pot position treble pot position thermistor voltage 3.3V supply SPDIF detect codec reference voltage twiddler DC offset turn-on signal (result is 8-bit, 0 = 0V, FF = 5V) sk 42,af,ff select TAPE input (analog) sk 31,1f,ff...
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Appendix Hex Notation Hex is an alphanumeric code representing a four bit binary number: 0000 = “0” = 0 0001 = “1” = 1 etc. 1001 = “9” = 9 1010 = “A” = 10 1011 = “B” = 11 1100 = “C”...
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Appendix Diagnostic voltages available at the uC ADC ports uC (U202) ADC ports TAP command Description "ad 0" bass pot "ad 1" treble pot "ad 2" thermistor (see thermistor readings in appendix) "ad 3" 3.3V "ad 4" SPDIF sense (< 1V = SPDIF, > 3V = no SPDIF) "ad 5"...
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Appendix Two digit hex to voltage conversion (continued) Decimal U202 ADC Decimal U202 ADC port port voltage voltage 1.094V 1.973V 1.113V 1.992V 1.133V 2.012V 1.152V 2.031V 1.172V 2.051V 1.191V 2.070V 1.211V 2.090V 1.230V 2.109V 2.129V 1.250V 1.270V 2.148V 1.289V 2.168V 2.188V 1.309V 1.328V...
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Appendix Two digit hex to voltage conversion (continued) Decimal U202 ADC Decimal U202 ADC port port voltage voltage 2.852V 3.730V 2.871V 3.750V 2.891V 3.770V 2.910V 3.789V 2.930V 3.809V 2.949V 3.828V 2.969V 3.848V 2.988V 3.867V 3.887V 3.008V 3.027V 3.906V 3.047V 3.926V 3.945V 3.066V 3.086V...
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Appendix Two digit hex to voltage conversion (continued) Decimal U202 ADC port voltage 4.609V 4.629V 4.648V 4.668V 4.688V 4.707V 4.727V 4.746V 4.766V 4.785V 4.805V 4.824V 4.844V 4.863V 4.883V 4.902V 4.922V 4.941V 4.961V 4.980V Thermistor readings (TAP command “ad2”) Temperature Decimal Temperature Decimal (code out)
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Appendix Thermistor readings (TAP command “ad2”) Temperature Decimal Temperature Decimal (code out) (code out) 42 C 165.0 0xA5 89 C 71.0 0x47 43 C 163.0 0xA3 90 C 69.0 0x45 44 C 161.0 0xA1 91 C 67.0 0x43 45 C 159.0 0x9F 92 C...