Figure 4-14 Vi Voltage And Current Test - Vi Interlock - Agilent Technologies TS-8989 PXI User Manual

4 Diagnostic Testing Details
CEDGN Testplan Description and Flow
Figure 4-14 VI Voltage and Current Test - VI Interlock Connection
Hi
Lo
DMM
HiSense
LoSense
Hi
Lo
VI
HiSense
LoSense
54
Instrument Matrix
Matrix001: Row1
Matrix001: Row2
Matrix001: Row3
UUTCOM 1
Analog Bus
DIO M9187A Test
This test verifies the physical connection between the
M9187A DIO and the instrument routing card.
This test requires voltage input from the SLU DAC to the
DIO Vext to power up the Digital Output Signal.
Figure 4- 15
pin matrix AUX to short the Digital Input and Digital Output
of the M9187A. The test will conduct by writing data to the
specified output ports and reading back the data from the
specified input ports.
Figure 4- 16
test the Gnd Pin of the M9187A. The DMM will measure
each Gnd Pin through the pin matrix and fixtures to ensure
that the Gnd Pin connections are connected.
Matrix001: Inst1
Matrix001: Inst2
Matrix001: Inst3
Matrix001: Inst4
Matrix001: Inst13
Matrix001: Inst14
Matrix001: Inst15
Matrix001: Inst16
Matrix001: Aux1
Matrix001: Aux2
Matrix001: Aux3
2 3 4
illustrates the internal switching connection of
illustrates the internal switching connection to
Test Fixture
U8989-61625
TS-8989 Diagnostics User's Guide
Test Fixture
U8989-61623