Schematic Diagram - Tft Board (5/11) (Xav-Ax100C2) - Sony XAV-AX100 Service Manual

2018/04/20 05:03:25 (GMT+09:00)
XAV-AX100/AX100C2
Ver. 1.3
XAV-AX100/AX100C2

5-26. SCHEMATIC DIAGRAM - TFT Board (5/11) (XAV-AX100C2) -

1 2
TFT BOARD (5/11)
A
U1-A
R238 W8 T2
[6] A_RMA0 33R A_A0 A_D0
R236 Y6 AB4
[6] A_RMA1 33R A_A1 A_D1
R226 M3 T1
[6] A_RMA2 33R A_A2 A_D2
R229 T3 AA5
[6] A_RMA3 33R A_A3 A_D3
R231 V4 R1
[6] A_RMA4 33R A_A4 A_D4
R230 R4 AA6
A_RMA5 A_A5 A_D5
[6] 33R
R232 W4 R2
[6] A_RMA6 33R A_A6 A_D6
R203 P4 AB5
[6] A_RMA7 33R A_A7 A_D7
R233 Y3 AA3
[6] A_RMA8 33R A_A8 A_D8
R227 M4 V1
[6] A_RMA9 33R A_A9 A_D9
R239 AA8 AA4
B
[6] A_RMA10 33R A_A10 A_D10
R235 Y5 U1
[6] A_RMA11 33R A_A11 A_D11
R237
W7 AB2
[6] A_RMA12 33R A_A12 A_D12
R228 N4 U2
A_RMA13 A_D13
[6] 33R A_A13
R234 W5 AB3
[6] A_RMA14 33R A_A14 A_D14
R240 AB8 V2
[6] A_RMA15 33R A_A15 A_D15
AA2 U4
[6] A_RDQS0H A_DQS1 A_VREF
AB1 U3
[6] A_RDQS0H# A_DQS1B A_PLL33
W2 M5
[6] A_RDQS0L A_DQS0 A_VDDQ
Y1 N5
[6] A_RDQS0L# A_DQS0B A_VDDQ
R65 AA1 P5
[6] A_RDQM0L 10R A_DM0 A_VDDQ
R66 W1 R5
[6] A_RDQM0H 10R A_DM1 A_VDDQ
RN13 N1 T5
[6] A_RWE A_WE_B A_VDDQ
N2 U5
[6] A_RODT A_ODT A_VDDQ
P1 V5
[6] A_RCAS A_CAS_B A_VDDQ
P2 V6
[6] A_RRAS A_RAS_B A_VDDQ
R298 P3 V7
C [6] A_RRESET 33R A_RST_B A_VDDQ
R297 M1 V8
[6] A_RBA2 33R A_BA2 A_VDDQ
R299
V3 AB7
[6] A_RBA1 33R A_BA1 A_CKE
R296 M2 AB6
A_RBA0 A_BA0 A_CK
[6] 33R
AA7
A_CKB
SPHE8388 SPHE8388
D
10Rx4
[6] A_RMD4
[6] A_RMD6
A_RMD2
[6]
A_RMD0
[6]
10Rx4
A_RMD11
[6]
A_RMD13
[6]
[6] A_RMD9
[6] A_RMD15
10Rx4
[6] A_RMD12
[6] A_RMD8
E
[6] A_RMD14
[6] A_RMD10
10Rx4
[6] A_RMD1
[6] A_RMD3
[6] A_RMD7
[6] A_RMD5
P ow er bypass cap. for V D D Q _15
[4,6]
DDR_1V5
F
52 52
3 4 5
A_RMD0 [6]
A_RMD1 [6]
U2
A_RMD2 [6]
A_RMD3 [6]
N3
[6] A_RMA0 A0
A_RMD4 [6]
P7
[6] A_RMA1 A1
A_RMD5
[6]
P3
[6] A_RMA2 A2
A_RMD6 [6]
N2
[6] A_RMA3 A3
A_RMD7 [6]
P8
A_RMA4
[6] A4
A_RMD8 [6]
P2
[6] A_RMA5 A5
A_RMD9 [6]
R8
[6] A_RMA6 A6
A_RMD10 [6]
R2
[6] A_RMA7 A7
A_RMD11 [6]
T8
[6] A_RMA8 A8
A_RMD12 [6]
R3
[6] A_RMA9 A9
A_RMD13
[6]
L7
[6] A_RMA10 A10/AP
A_RMD14 [6]
R7
[6] A_RMA11 A11
A_RMD15 [6]
N7
A_RMA12 A12
[6]
A_VREF [6]
T3
[6] A_RMA13 A13
DDR_PLL33 [4,6]
T7
[6] A_RMA14 A14
DDR_1V5
[4,6]
M7
[6] A_RMA15 NC
D3
[6] A_RDQM0H DMU
E7
[6] A_RDQM0L DML
C7
A_RDQS0H
[6] DQSU
B7
A_RDQS0H# DQSU#
[6]
F3
[6] A_RDQS0L DQSL
G3
[6] A_RDQS0L# DQSL#
K1
[6] A_RODT ODT
A_RCKE [6]
R22 L2
10K CS#
A_RCLK
[6]
M2
[6] A_RBA0 BA0
A_RCLK# [6]
N8
[6] A_RBA1 BA1
M3
A_RBA2 BA2
[6]
L3
[6] A_RWE WE#
J3
[6] A_RRAS RAS#
K3
[6] A_RCAS CAS#
RN11
DDR_D4
[6]
DDR_D6
[6]
DDR_D2
[6]
DDR_D0
[6]
RN15
DDR_D11
[6]
DDR_D13
[6]
DDR_D9 [6]
DDR_D15 [6]
RN16
DDR_D12 [6]
DDR_D8 [6]
DDR_D14 [6]
DDR_D10 [6]
RN17
DDR_D1 [6]
DDR_D3 [6]
DDR_D7 [6]
DDR_D5
[6]
[4,6]
DDR_1V5
[4,6]
DDR_PLL33
[6]
A_VREF
6 7
[4,6] [4,6]
DDR_1V5 DDR_1V5
E3
DDR_D0
DQ0 [6]
W632GG6KB-12 (x16) F7
DQ1 DDR_D1
[6]
F2
DQ2 DDR_D2 [6]
F8
DQ3 DDR_D3 [6]
H3
DQ4 DDR_D4 [6]
1 2 3 7 8 9
H8
DQ5 DDR_D5 [6]
A
G2
VDDQ DQ13 DQ15 DQ12 VDDQ VSS DDR_D6
DQ6 [6]
B
H7
DDR_D7
DQ7 [6]
VSSQ VDD VSS /DQSU DQ14 VSSQ
D7
C DDR_D8
DQ8 [6]
VDDQ DQ11 DQ9 DQSU DQ10 VDDQ C3
DDR_D9
D DQ9 [6]
C8
VSSQ VDDQ DMU DQ8 VSSQ VDD DQ10 DDR_D10 [6]
E C2
DQ11 DDR_D11 [6]
VSS VSSQ DQ0 DML VSSQ VDDQ
A7
F
DQ12 DDR_D12 [6]
VDDQ DQ2 DQSL DQ1 DQ3 VSSQ A2
DQ13 DDR_D13 [6]
G
B8
VSSQ DQ6 /DQSL VDD VSS VSSQ DDR_D14
DQ14 [6]
H
A3
DDR_D15
DQ15 [6]
VREFDQ VDDQ DQ4 DQ7 DQ5 VDDQ
J
NC VSS /RAS CK VSS NC
H1
VREFDQ A_RVREF [6]
K
M8
ODT VDD /CAS /CK VDD CKE VREFCA
L
NC /CS /WE A10/AP ZQ NC
J7
M
CK A_RCLK [6]
VSS BA0 BA2 NC VREFCA VSS K7
CK# A_RCLK# [6]
N
K9
VDD A3 A0 A12/BC# BA1 VDD
CKE A_RCKE [6]
P
VSS A5 A2 A1 A4 VSS
T2
R [6]
RESET# A_RRESET
VDD A7 A9 A11 A6 VDD L8
ZQ A_DEVICE_ZQ
T
VSS /RST A13 NC A8 VSS R23
240R/1%
J1
NC
J9
NC
L1
NC
L9
NC
NOM. 2Gb
MAX. 4Gb
1. NT5CB128M16FP-DI -40 ~ 95
[4,6]
DDR_1V5
P ow er bypass cap. for V D D Q _1 5
[4,6] DDR_1V5
[6]
A_RVREF
SYS SET