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B
SCHEMATIC DIAGRAMS-3 (PART-3)
BLOCK DIAGRAM DIGITAL AUDIO SECTION
1
S/PDIF
4
INPUT
XTAL
24.576MHz
2
XTAL
11.2896MHz
3
68
DIR_MCK
Q8101
MCLK_IN
69
CX_SCLK
SCLK_IN
70
CX_LRCK
AP5_IN
76
DSP_FLR
AP1_IN
HDMI Tx
HDMI Rx
4
96
HDMI_MCK
MCLK_OUT
95
HDMI_BCK
SCLK_OUT
94
HDMI_LRCK
AP5_OUT
88
HDMI_FLR
AP1_OUT
89
HDMI_SLR
AP2_OUT
90
HDMI_CSW
AP3_OUT
91
HDMI_SBLR
AP4_OUT
87
HDMI_SPDIF
AP0_OUT
USB
5
C
D
Q301
PCM9211
DIR/ADC
DIR
DIR
4
MPIO_A1
AUXIN1
39
XTI
DIVIDE
15
MPIO_B
MPIO_C
MPO0
16
MPO1
256x48K
256x44.1K
No USE
E
ANALOG
DOMAIN
ADC
A
D
C
Q302
PCM1681
DAC
MAIN OUT
TX-SR313/ HT-R358/ 391/ 558/ 591/ HT-RC430
F
G
Q201
DA808
DSP
160
AHCLKX1/EPWM0B/GP3[14]
DIR_MCK
CX_SCLK
126
ACLKX0/ECAP0/APWM0/GP2[12]
CX_LRCK
127
AFSX0/GP2[13]/BOOT[10]
DSP_FLR
111
AXR0[0]/AFSR2/GP3[0]
DSP_SLR
112
AXR0[1]/ACLKX2/GP3[1]
DSP_CSW
113
AXR0[2]/AXR2[3]/GP3[2]
DSP_SBLR
115
AXR0[3]/AXR2[2]/GP3[3]
I2S
DIR_MCK
125
AHCLKX0/AHCLKX2/USB_REFCLKIN/GP2[11]
DIR_BCK
130
ACLKR0/ECAP1/APWM1/GP2[15]
DIR_LRCK
131
AFSR0/GP3[12]
LR Clock
DIR_FLR
116
AXR0[4]/GP3[4]
I2S0
HDMI_LRCK
121
AXR0[8]/GP3[8]
N/A
HDMI_SLR
117
AXR0[5]/AFSX2/GP3[5]
I2S1
HDMI_CSW
118
AXR0[6]/ACLKR2/GP3[6]
I2S2
HDMI_SBLR
122
UART1_RXD/AXR0[9]/GP3[9]
I2S3
HDMI_SPDIF
22
EMA_OE/UHPI_HDS1/AXR0[13]/GP2[7]
N/A
123
UART1_TXD/AXR0[10]/GP3[10]
USB DATA
124
AXR0[11]/AXR2[0]/GP3[11]
137
USB0_DP
138
USB0_DM
Model No. TX-SR313/ HT-R391/ HT-R358/ HT-R558/ HT-RC430/ HT-R591 SCHEMATIC DIAGRAM
(PART-3) BLOCK DIAGRAM (DIGITAL AUDIO)
28-12-2011
H
HDMI Input
S/PDIF & Analog
DSD
HBR
Input
Master Clock
Bit Clock
N/A
LR Clock
LR Clock
DSD0B
HBR1st
I2S0
DSD2B
N/A
DSD1A
HBR2nd
N/A
DSD1B
HBR3rd
DSD2A
HBR4th
DSD0A
N/A
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