D-Board (2 Of 2) Block Diagram - Panasonic TH-65PHD8BK Service Manual

15.21. D-Board (2 of 2) Block Diagram

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TH-65PHD8 SERIES
D-Board (2 of 2) Block Diagram
DIGITAL SIGNAL PROCESSOR
FORMAT CONVERTER,
PlASMA AI
SUB-FIELD PROCESSOR
R,G,B MAIN VIDEO 24bit
R,G,B SUB VIDEO 24bit
IIC
HD,VD,CLK
PLL SYNTHESIZER
CLK1
CLK2
P+5V
DATA TIMING 8bit
VCC
DATA POWER FEEDBACK 8bit
SUSTAIN DATA 6bit
P+5V
SCAN DATA 13bit
VCC
ROM_A18-20
JTAG
CLK3
OSD
DRVRST
SS_SOS
DRVRST_5V
SC_SOS7
IC9501
1.5V
SIGNAL PROCESSOR
FORMAT CONVERTER
1.5V
DIGITAL
PICTURE
SIGNAL
IMPROVER
PROCESSING
HD,VD
CLK
BUS
CLK
IIC
SDA2
CONT
CONT
SCL2
RST
NRST
X9501
IC9502
20MHz
3.3V
IC9306
LEVEL CONVERTER
3.3V 5V
IC9305
LEVEL CONVERTER
3.3V 5V
IC9304
P+5V
LEVEL CONVERTER
SUSTAIN DATA 6bit
VCC
3.3V 5V
IC9151,9152
LEVEL CONVERTER
SCAN DATA 13bit
VCC
3.3V 5V
P+5V
D20 1 2
TO SC20
2.5V 3.3V
2.5V 3.3V
R0-R9
I/P ,FORMAT G0-G9
CONVERTER
B0-B9
HD,VD,CLK
RMD
0-15
JTAG
DDR-SRAM
INTERFACE
OSD
DATA ADDRESS
+2.5V-2
DQ0 A0
VDD
DQ31 A11
IC9504
128M DDR SDRAM
DATA TIMING 8bit
DATA POWER FEEDBACK 8bit
IC9102
2.5V_3
LEVEL CONVERTER
VDD
TDO
TDI2
TMS
TMS2
2.5V 3.3V
TCK
TCK2
3.3V
IC9103
LEVEL CONVERTER
TDO2 VDD TDO
2.5V 3.3V
TRST TRST
3 4 6 7 8 9 13 14 17 18 19 20 11
ROM
A18,19
IC9101
FPGA
CONFIGRATION
JTAG
TDO
D10 7 10 9 8 6 5
FOR
FACTORY
USE
89