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INSTRUCTION MANUAL
Digttal
Mulllmeter
Models
t72A.
i73A
THEORY
OF OPERATION
4)
The auto-calibrate
correction
is
continually
applied
to
the
reference
current
V
circuit.
Sc is
closed
during
Auto-Cal
to update
the
correction
voltage,
and
is
stored
on capacitor
Cc.
Auto-Calibrate
correction
is generated
similiarly
to auto-zero
correction,
with
the
exception
that
forced
current
switching
is done
at
the
full-scale
current
input
rate.
Auto-calibrate
correction
varies
lr
and thus,
sets
the
amount
of
charge
removed
from
Ci during
the
discharge
cycle
since
the
source"on"
time
is
fixed
at
one-half
the
clock
period.
5)
In the
reference
current
circuit,
the
base of
Qr is
referenced
to ground
and
the
emitter
resistor
R2 connects
to a negative
voltage
(-V).
The current
through
R,
(I)
is
approximately
equal
to
lr
+ Ic
(neglecting
base
current
of
Qr).
Since
I is constant,
I,
will
vary
inversely
with
respect
to a change
of
It.
6)
The reference
current
switch
consists
of
two diodes,
and
is
controlled
by the
current
switch
driver
circuitry.
Reference
current
is_removed
from
the
summing
junction
of
the
active
integrator
when
D] is
conducting.
When Q of
the
D flip
flop
is high,
D2
conducts
cutting
off
DI.
The Q output
of
the
flip
flop
is
the
digital
pulse
train
proportional
to
the
output.
The circuitry
which
forces
predetermined
switching
rates
during
AZ-I,
AZ-2
and ACAL is not
shown.
Oscillator.
The oscillator
(shown
in
Figure
5-15)
is
crystal
controlled
and operates
atfapproximately
669
kHz.
It
is divided
down 2:l
to produce
the
A/D converter
clock.
The
oscillator
runs
at
twice
the
clock
rate
for
the
following
two
reasons:
I)
It
allows
the
current
switch
to be on only
one-half
of
the
clock
period,
so
that
there
is
always
an off
time
even
when
the
current
switch
is
on for
consecutive
clock
cycles.
This
eliminates
a gross
nonlineraty
problem
from
the
charge-balance
A/D converter.
It
allows
the
current
to be switched
on and off
with
a 90"
phase
shifted
clock
sigr
$2)the
current
pu1 ses.
enerated
by the
oscillator)
so that
there
will
be no timing
problems
with
the
edges
CYOI
47pF
~807
18KQ
TO CLOCK
DIVIDER
CMOS
I NVERTERS
FIGURE 5-15.
Simplified
Schematic
of
669 ktiz
Oscillator.
5-19
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