Keithley 172A Instruction Manual page 68

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THEORY OF OPERATION
INSTRUCTION MANUAL
Digital
Mulllmrtrr
MehI,
172A. 173A
2)
Charge
balance
A/D conversion
is
used.
With this
conversion
method,
the
resulting
I
output
pulse
train
has the
property
that
its
average
frequency
over
a given
time
period
is
proportional
to
the
average
of
the
input
voltage
over
the
same time
period.
Thus,
the
digital
output
is
a representation
of
the
true
integral
of
the
analog
input
over
any specificed
sampling
time.
The basic
converter
consists
of
the
active
integrator,
comparator,
current
switch
driver,
reference
current
switch
and the
reference
current
source.
For
this
description,
assume
that
the
charge
on the
integrating
capacitor
(ci)
is
such
that
the.obtput
of
~604
is
initially
at
some positive
level.
nal
current
(I in)
is
integrated
by the
capacitor,
As the
input
sig-
the
output
of
~605
ramps
negative
and
eventually
becomes
more negative
than
the
comparator
threshold.
The comparator
output
goes
to
logic
zero,
which
is
inverted
to
logic
1 by the
inverter
and applied
to
the
"Cl"
input
of
the
flip
flop.
At the
next
positive
going
edge
of
the
Clock,
this
"one"
is
latched
by the
flip
flop
and appears
as the
set
output
QR, and the
c output
of
the
flip
flop
turns
on the
current
switch.
The reference
current
lr
is
forced
to
flow
out
of
the
integrating
capacitor,
discharging
it,and
the
output
of
~604 crosses
the
comparator
threshold
in
the
positive
direction.
This
results
in a logic
0 at
the
"D"
input
of
the
flip
flop
and the
next
positive
going
edge of
the
CLOCK signal
resets
the
flip
flop,
which
terminates
the
pulse
on the
QR line
and turns
off
the
current
switch.
The con-
verter
will
remain
in
this
state
until
the
next
time
that
the
integrator
voltage
crosses
the
threshold
of
the
comparator
in
the
negative
direction.
For
relative
large
values
of
the
input,
the
time
required
for
the
capacitor
to be recharged
to
the
point
where
the
comparator
threshold
is
exceeded
will
be relatively
short
and the
integration
cycle
(charging
- discharging
cycle)
described
will
occur
at
a high
frequency.
Con-
versely,
with
lower
values
of
input
current,
the
charging
time
of
the
integrator
will
be longer
and the
events
described
will
occur
at
a lower
rate.
Thus,
the
repetition
rate
of
current
pulses
(and
digital
output
pulses)
is a function
of
input
current.
It
_
should
be noted
that
the
current
switch
driver
circuitry
shown
has been
greatly
simplifir
for
this
discussion.
In actual
operation,
the
current
pulse
is
limited
in
time
to
one-
half
of
the
output
pulse
on the
QR line,
and
is
turned
on and off
by a 90" out
of
phase
clock
which
centers
the
current
pulse
on the
digital
output
pulse
to eliminate
edge
problems.
Since
the
amount
of
current
removed
from
the
integrating
capacitor
during
each
discharge
cycle
is equal
to
the
product
Of
lr
and one-half
clock
period,
the
current
pulses
are
uniform
in size.
The total
charge
removed
from
the
capacitor
in any
given
time
period
is
equal
to
the
total
charge
that
flowed
in
(within
a resolution
of
one
discharge
increment).
The uniformity
of
size
of
the
reference
current
pulse
guarantees
that
the
total
number
of
such
pulses
is
proportional
to the
time-integral
of
the
input
current.
3)
The auto-zero
correction
is
always
applied
to
the
active
integrator,
but
during
AZ-l
and AZ-Z,
the
switch
Sc is
closed
which
allows
correction
of
the
auto-zero
signal.
The rest
of
the
time
it
is
stored
on capacitor
C,.
The correction
signal
is
generated
by forced
switching
of
the
current
source
at
the
"zero"
input
rate.
Since
the
input
is
offset,
this
equates
to a midscale
current
input.
The correction
signal
is
the
dc
level
developed
at
the
output
of
the
comparator
by Rf and
filtered
by Cf.
Auto-zero
correct-
ion
is
supplied
as negative
feedback
to
the
integrator
input.
Auto-zero
correction
can
be considered
as a contribution
to
input
current
since
it
affects
the
charge
portion
of
the
integration
cycle.
5-18

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