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FWS-2253
Network Appliance
nd
User's Manual 2
Ed
Last Updated: July 5, 2016

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Summary of Contents for Asus AAEON FWS-2253

  • Page 1 FWS-2253 Network Appliance User’s Manual 2 Last Updated: July 5, 2016...
  • Page 2 Copyright Notice This document is copyrighted, 2016. All rights are reserved. The original manufacturer reserves the right to make improvements to the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means without the prior written permission of the original manufacturer.
  • Page 3 Acknowledgement All other products’ name or trademarks are properties of their respective owners. Microsoft Windows is a registered trademark of Microsoft Corp. Intel, Pentium, Celeron, and Xeon are registered trademarks of Intel Corporation Core, Atom are trademarks of Intel Corporation ITE is a trademark of Integrated Technology Express, Inc.
  • Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity FWS-2253  40 W power adaptor  Rubber feet  Product DVD  If any of these items are missing or damaged, please contact your distributor or sales representative immediately.
  • Page 5 About this Document This User’s Manual contains all the essential information, such as detailed descriptions and explanations on the product’s hardware and software features (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the AAEON.com for the latest version of this document.
  • Page 6 Safety Precautions Please read the following safety instructions carefully. It is advised that you keep this manual for future references All cautions and warnings on the device should be noted. All cables and adapters supplied by AAEON are certified and in accordance with the material safety laws and regulations of the country of sale.
  • Page 7 As most electronic components are sensitive to static electrical charge, be sure to ground yourself to prevent static charge when installing the internal components. Use a grounding wrist strap and contain all electronic components in any static-shielded containers. If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii.
  • Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation.
  • Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON Embedded Box PC/ Industrial System 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) 印刷电路板 ○ ○ ○ ○ ○ ○ 及其电子组件 外部信号 ○ ○ ○ ○ ○ ○ 连接器及线材...
  • Page 10 China RoHS Requirement (EN) Poisonous or Hazardous Substances or Elements in Products AAEON Embedded Box PC/ Industrial System Poisonous or Hazardous Substances or Elements Hexavalent Polybrominated Polybrominated Component Lead Mercury Cadmium Chromium Biphenyls Diphenyl Ethers (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) PCB &...
  • Page 11: Table Of Contents

    Table of Contents Chapter 1 - Product Specifications ..................1 Specifications ......................2 Chapter 2 – Hardware Information ..................5 Dimensions ....................... 6 Jumpers and Connectors ..................9 List of Jumpers ....................... 11 2.3.1 Auto PWRBTN Selection (JP1) ............11 2.3.2 RTCTEST Setting Selection (CN3) .............
  • Page 12 3.4.6.1 Serial Port Console Redirection: COM1 Console Redirection Settings................... 26 3.4.7 Advanced: SIO Configuration ............29 3.4.7.1 SIO Configuration: Serial Port Configuration ..... 30 Setup submenu: Chipset ..................31 3.5.1 Chipset: North Bridge ................. 32 3.5.1.1 North Bridge: Display Control Configuration ....33 Setup submenu: Security ..................
  • Page 13: Chapter 1 - Product Specifications

    Chapter 1 Chapter 1 - Product Specifications...
  • Page 14: Specifications

    Specifications System ® Onboard Intel Atom™ N2807 2.16 GHz SoC Processor  204-pin single channel DDR3L 1333MHz System Memory  SODIMM slot x 1, up to 8GB Chipset  ® Intel Ethernet Controller I211-AT Ethernet  Gigabit Ethernet x 4 AMI BIOS BIOS ...
  • Page 15 12V DC power input x 1 Software Reset Switch x 1 Black Color  12V DC power in connector/ 40W power Power Supply  adapter x 1 4-pin DC power out connector for HDD (optional) 160 x 35 x 105 mm (6.3 x 1.37 x 4.13”) Dimension (W x D x H) ...
  • Page 16 10%~80% @ 40°C, non-condensing Storage Humidity  0.5 Grms/5~500Hz/ operation Anti-Vibration  1.5 Grms/5~500Hz/ non-operation 10G peak acceleration (11m sec. duration), Anti-Shock  operation 20G peak acceleration (11m sec. duration), non operation Chapter 1 – Product Specifications...
  • Page 17: Chapter 2 - Hardware Information

    Chapter 2 Chapter 2 – Hardware Information...
  • Page 18: Dimensions

    Dimensions System Chapter 2 – Hardware Information...
  • Page 19 Board Chapter 2 – Hardware Information...
  • Page 20 Chapter 2 – Hardware Information...
  • Page 21: Jumpers And Connectors

    Jumpers and Connectors Component Side Chapter 2 – Hardware Information...
  • Page 22 Solder side Chapter 2 – Hardware Information...
  • Page 23: List Of Jumpers

    List of Jumpers Please refer to the table below for all of the board’s jumpers that you can configure for your application Label Function Auto PWRBTN Selection Clear CMOS RTCTEST Setting Selection CF Power Selection CN30 Power Button CN31 Software Reset 2.3.1 Auto PWRBTN Selection (JP1) Function Disable Auto PWRBTM (default)
  • Page 24: List Of Connectors

    List of Connectors Please refer to the table below for all of the board’s connectors that you can configure for your application Label Function HDD POWER HDD POWER CF SOCKET CN16 COM1 CN19 2*USB2.0 CN21 +12V POWER IN CN22 Mini-card socket CN24 Battery CN26...
  • Page 25: Hdd Power (Cn1/ Cn4)

    LED4 LAN4 LED Instruction CPU_FAN 2.4.1 HDD Power (CN1/ CN4) Signal Signal +12V 2.4.2 CMOS Setting Selection (CN2) Function Clear CMOS Normal (Default) 2.4.3 CF Power Selection (CN6) Function 3.3V (Default) Chapter 2 – Hardware Information...
  • Page 26: Vga Connector (Cn28)

    2.4.4 VGA Connector (CN28) Signal Signal BLUE GREEN 2.4.5 PS2 Header (CN29) Signal Signal KDAT KCLK MDAT KCLK 2.4.6 CPU FAN (CPU FAN) Signal Signal +12V FANTAC FANCONTROL Chapter 2 – Hardware Information...
  • Page 27: Chapter 3 - Ami Bios Setup

    Chapter 3 Chapter 3 - AMI BIOS Setup...
  • Page 28: System Test And Initialization

    System Test and Initialization The system uses certain routines to perform testing and initialization. If an error, fatal or non-fatal, is encountered, a few short beeps or an error message will be outputted. The board can usually continue the boot up sequence with non-fatal errors. The system configuration verification routines check the current system configuration against the values stored in the CMOS memory.
  • Page 29: Ami Bios Setup

    AMI BIOS Setup The AMI BIOS ROM has a pre-installed Setup program that allows users to modify basic system configurations, which is stored in the battery-backed CMOS RAM and BIOS NVRAM so that the information is retained when the power is turned off. To enter BIOS Setup, press <Del>...
  • Page 30: Setup Submenu: Main

    Setup Submenu: Main Chapter 3 – AMI BIOS Setup...
  • Page 31: Setup Submenu: Advanced

    Setup Submenu: Advanced Chapter 3 – AMI BIOS Setup...
  • Page 32: Advanced: Cpu Configuration

    3.4.1 Advanced: CPU Configuration Options summary: Intel Virtualization Disabled Technology Enabled Optimal Default, Failsafe Default When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology EIST Disabled Optimal Default, Failsafe Default Enabled Enable/Disable Intel SpeedStep Max CPU C-State Optimal Default, Failsafe Default This option controls Max C state that the processor will support Chapter 3 –...
  • Page 33: Advanced: Ide Configuration

    3.4.2 Advanced: IDE Configuration Chapter 3 – AMI BIOS Setup...
  • Page 34: Advanced: Usb Configuration

    3.4.3 Advanced: USB Configuration Options summary: Legacy USB Support Enabled Optimal Default, Failsafe Default Disabled Auto Enables BIOS Support for Legacy USB Support. When enabled, USB can be functional in legacy environment like DOS. AUTO option disables legacy support if no USB devices are connected Chapter 3 –...
  • Page 35: Advanced: Hardware Monitor

    3.4.4 Advanced: Hardware Monitor Chapter 3 – AMI BIOS Setup...
  • Page 36: Advanced: Power Management

    3.4.5 Advanced: Power Management Options summary: Power Mode ATX Type Optimal Default, Failsafe Default AT Type Select power supply mode. Restore on Power Last State Optimal Default, Failsafe Default Loss Power On Power Off Select power state when power is re-applied after a power failure. RTC wake system Disable Optimal Default, Failsafe Default...
  • Page 37: Advanced: Serial Port Console Redirection

    3.4.6 Advanced: Serial Port Console Redirection Options summary: Console Disabled Redirection Enabled Optimal Default, Failsafe Default Console Redirection Enable or Disable Chapter 3 – AMI BIOS Setup...
  • Page 38: Serial Port Console Redirection: Com1 Console

    3.4.6.1 Serial Port Console Redirection: COM1 Console Redirection Settings Options summary: VT100 VT100+ Terminal Type VT-UTF8 ANSI Optimal Default, Failsafe Default Emulation: ANSI: Extended ASCII char set. VT100: ASCII char set. VT100+: Extends VT100 to support color, function keys, etc. VT-UTF8: Uses UTF8 encoding to map Unicode chars onto 1 or more bytes.
  • Page 39 Data Bits Optimal Default, Failsafe Default Data Bits None Optimal Default, Failsafe Default Even Parity Mark Space A parity bit can be sent with the data bits to detect some transmission errors. Even: parity bit is 0 if the num of 1’s in the data bits is even. Odd: parity bit is 0 if num of 1’s in the data bits is odd.
  • Page 40 VT400 Select FunctionKey and KeyPad on Putty. Always Enable Optimal Default, Failsafe Default Redirection After BIO Boot Loader The Setting Specify if BootLoader is selected than Legacy console redirection is disabled before booting to Legacy OS. Default value is Always Enable which means Legacy console Redirection is enabled for Legacy OS.
  • Page 41: Advanced: Sio Configuration

    3.4.7 Advanced: SIO Configuration Chapter 3 – AMI BIOS Setup...
  • Page 42: Sio Configuration: Serial Port Configuration

    3.4.7.1 SIO Configuration: Serial Port Configuration Options summary: Serial Port Disabled Enabled Optimal Default, Failsafe Default En/Disable Serial Port (COM) Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=3F8; IRQ=4; IO=2F8; IRQ=3; Select an optimal setting for IO device Chapter 3 – AMI BIOS Setup...
  • Page 43: Setup Submenu: Chipset

    Setup submenu: Chipset Chapter 3 – AMI BIOS Setup...
  • Page 44: Chipset: North Bridge

    3.5.1 Chipset: North Bridge Chapter 3 – AMI BIOS Setup...
  • Page 45: North Bridge: Display Control Configuration

    3.5.1.1 North Bridge: Display Control Configuration Options summary: DVMT Pre-Allocated Optimal Default, Failsafe Default 128M 160M 512M…… Select DVMT 5.0 Pre-Allocated (Fixed) Graphics Memory size used by the Internal Graphics Device. DVMT Total Gfx Mem 128MB 256MB Optimal Default, Failsafe Default Select DVMT 5.0 Pre-Allocated (Fixed) Graphics Memory size used by the Internal Graphics Device.
  • Page 46: Setup Submenu: Security

    Setup submenu: Security Change User/Administrator Password You can set a User Password once an Administrator Password is set. The password will be required during boot up, or when the user enters the Setup utility. Please Note that a User Password does not provide access to many of the features in the Setup utility. Select the password you wish to set, press Enter to open a dialog box to enter your password (you can enter no more than six letters or numbers).
  • Page 47: Setup Submenu: Boot

    Setup submenu: Boot Options summary: Quiet Boot Disabled Enabled Default En/Disable showing boot logo. Option ROM Messages Force BIOS Default Keep Current Set display mode for Option ROM Launch PXE OpROM Disabled Default Enabled En/Disable Legacy Boot Option Status LED LED OFF Default RED LED ON...
  • Page 48: Boot: Bbs Priorities

    GREEN LED FAST BLINK Configure Status LED 3.7.1 Boot: BBS Priorities Chapter 3 – AMI BIOS Setup...
  • Page 49: Setup Submenu: Exit

    Setup submenu: Exit Chapter 3 – AMI BIOS Setup...
  • Page 50: Chapter 4 - Drivers Installation

    Chapter 4 Chapter 4 – Drivers Installation...
  • Page 51: Product Cd/Dvd

    Product CD/DVD The FWS-2253 comes with a product DVD that contains all the drivers and utilities you need to setup your product. Insert the DVD and follow the steps in the autorun program to install the drivers. In case the program does not start, follow the sequence below to install the drivers. Step 1 –...
  • Page 52 Follow the instructions Drivers will be installed automatically Step 5 – Install Intel Sideband Fabric Device Driver (Windows 8.1 only) Open the Step 5 –Intel Sideband Fabric Device followed by Setup.exe Follow the instructions Drivers will be installed automatically Chapter 4 – Driver Installation...
  • Page 53: Appendix A - Watchdog Timer Programming

    Appendix A Appendix A - Watchdog Timer Programming...
  • Page 54: Watchdog Timer Initial Program

    A.1 Watchdog Timer Initial Program Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E(Note1) 0x2E or 0x4E SIO MB PnP Mode Data Register Data 0x2F(Note2) 0x2F or 0x4F Table 2 : Watchdog relative register table Register BitNum Value...
  • Page 55 ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value); #define byte IOReadByte(byte IOPort); // Watch Dog relative definition (Please reference to Table 2) #define byte TimerLDN //This parameter is represented from Note3 #define byte TimerReg //This parameter is represented from Note4 #define byte TimerVal // This parameter is represented from Note24...
  • Page 56 ************************************************************************************ VOID Main(){ // Procedure : AaeonWDTConfig // (byte)Timer : Time of WDT timer.(0x00~0xFF) // (boolean)Unit : Select time unit(0: second, 1: minute). AaeonWDTConfig(); // Procedure : AaeonWDTEnable // This procudure will enable the WDT counting. AaeonWDTEnable(); ************************************************************************************ Appendix A – Watchdog Timer Programming...
  • Page 57 ************************************************************************************ // Procedure : AaeonWDTEnable VOID AaeonWDTEnable (){ WDTEnableDisable(EnableLDN, EnableReg, EnableBit, 1); // Procedure : AaeonWDTConfig VOID AaeonWDTConfig (){ // Disable WDT counting WDTEnableDisable(EnableLDN, EnableReg, EnableBit, 0); // Clear Watchdog Timeout Status WDTClearTimeoutStatus(); // WDT relative parameter setting WDTParameterSetting(); VOID WDTEnableDisable(byte LDN, byte Register, byte BitNum, byte Value){ SIOBitSet(LDN, Register, BitNum, Value);...
  • Page 58 ************************************************************************************ VOID SIOEnterMBPnPMode(){ Switch(SIOIndex){ Case 0x2E: IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x01); IOWriteByte(SIOIndex, 0x55); IOWriteByte(SIOIndex, 0x55); Break; Case 0x4E: IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x01); IOWriteByte(SIOIndex, 0x55); IOWriteByte(SIOIndex, 0xAA); Break; VOID SIOExitMBPnPMode(){ IOWriteByte(SIOIndex, 0x02); IOWriteByte(SIOData, 0x02); VOID SIOSelectLDN(byte LDN){ IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 IOWriteByte(SIOData, LDN);...
  • Page 59 ************************************************************************************ VOID SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value){ Byte TmpValue; SIOEnterMBPnPMode(); SIOSelectLDN(byte LDN); IOWriteByte(SIOIndex, Register); TmpValue = IOReadByte(SIOData); TmpValue &= ~(1 << BitNum); TmpValue |= (Value << BitNum); IOWriteByte(SIOData, TmpValue); SIOExitMBPnPMode(); VOID SIOByteSet(byte LDN, byte Register, byte Value){ SIOEnterMBPnPMode();...
  • Page 60: Appendix B - I/O Information

    Appendix B Appendix B - I/O Information...
  • Page 61: I/O Address Map

    I/O Address Map Appendix B – I/O Information...
  • Page 62: Memory Address Map

    Memory Address Map Appendix B – I/O Information...
  • Page 63: Irq Mapping Chart

    IRQ Mapping Chart Appendix B – I/O Information...
  • Page 64 Appendix B – I/O Information...
  • Page 65 Appendix B – I/O Information...
  • Page 66: Appendix C - Standard Firewall Platform Setting

    Appendix C Appendix C - Standard Firewall Platform Setting...
  • Page 67: Standard Firewall Platform Setting

    Standard Firewall Platform Setting Status LED Control Table. IO 0XA04 BIT4 IO 0XA03 BIT0 IO 0XA01 BIT2 LED Off Red LED On Red LED Blink Red LED Fast Blink Green LED Blink Green LED Fast Blink Green LED On LAN ByPass Config Table IO 0XA00 IO 0XA00 IO 0XA00...
  • Page 68: Status Led Sample Code

    Status LED Sample Code #define LED_BASE_ADDR 0x48E // LED Off VOID LED_OFF() UINT16 TEMP16; TEMP16 = IoIn16(LED_BASE_ADDR) & 0xF7ED; IoOut16(LED_BASE_ADDR, TEMP16); // Red LED On VOID RED_LED_ON() UINT16 TEMP16; TEMP16 = IoIn16(LED_BASE_ADDR) & 0xF7ED; TEMP16 |= 0x0002; IoOut16(LED_BASE_ADDR, TEMP16); // Red LED Blink VOID RED_LED_BLINK() UINT16 TEMP16;...
  • Page 69 TEMP16 |= 0x0800; IoOut16(LED_BASE_ADDR, TEMP16); // Red LED Fast Blink VOID RED_LED_FBLINK() UINT16 TEMP16; TEMP16 = IoIn16(LED_BASE_ADDR) & 0xF7ED; TEMP16 |= 0x0802; IoOut16(LED_BASE_ADDR, TEMP16); // Green LED On VOID GREEN_LED_ON() UINT16 TEMP16; TEMP16 = IoIn16(LED_BASE_ADDR) & 0xF7ED; TEMP16 |= 0x0812; IoOut16(LED_BASE_ADDR, TEMP16);...
  • Page 70 TEMP16 = IoIn16(LED_BASE_ADDR) & 0xF7ED; TEMP16 |= 0x0012; IoOut16(LED_BASE_ADDR, TEMP16); // Green LED Fast Blink VOID GREEN_LED_FBLINK() UINT16 TEMP16; TEMP16 = IoIn16(LED_BASE_ADDR) & 0xF7ED; TEMP16 |= 0x0810; IoOut16(LED_BASE_ADDR, TEMP16); Appendix C – Standard Firewall Platform Setting...
  • Page 71: Lan Bypass Mode Sample Code

    LAN Bypass Mode Sample Code #define LANBP_BASE_ADDR 0x48C #define PAIR_SEL_BASE_ADDR 0x4B8 Select LAN Pair I or II PAIR_NUM = 0x00 - PAIR I 0x01 - PAIR II VOID SEL_PAIR( UINT8 PAIR_NUM; UINT8 TEMP8; PAIR_NUM = PAIR_NUM << 5; TEMP8 = IoIn8(PAIR_SEL_BASE_ADDR) & 0xDF; TEMP8 |= PAIR_NUM;...
  • Page 72 TEMP8 = IoIn8(LANBP_BASE_ADDR + 3) | 0x10; IoOut8(LANBP_BASE_ADDR + 3, TEMP8); Sleep(500); IoOut8(LANBP_BASE_ADDR + 3, TEMP8 & 0xEF); LAN1 & 2 Power On ByPass Mode Set BP_MODE = 0x00 - Pass Through Mode = 0x01 - By Pass Mode VOID LAN12_PWRON_BP() UINT8 TEMP8;...
  • Page 73 LAN1 & 2 Power Off ByPass Mode Set BP_MODE = 0x00 - Pass Through Mode = 0x01 - By Pass Mode VOID LAN12_PWROFF_BP() UINT8 TEMP8; SEL_PAIR(0x00) ; // Select Pair I TEMP8 = IoIn8(LANBP_BASE_ADDR) & 0x7F; TEMP8 |= BP_MODE << 7; IoOut8(LANBP_BASE_ADDR, TEMP8);...
  • Page 74 TEMP8 |= BP_MODE; IoOut8(LANBP_BASE_ADDR + 1, TEMP8); EXE_SET(); // Execute Set LAN3 & 4 Power Off ByPass Mode Set BP_MODE = 0x00 - Pass Through Mode = 0x01 - By Pass Mode VOID LAN34_PWROFF_BP() UINT8 TEMP8; SEL_PAIR(0x01) ; // Select Pair II TEMP8 = IoIn8(LANBP_BASE_ADDR) &...
  • Page 75 VOID WDT_LAN12_BP() UINT8 TEMP8; SEL_PAIR(0x00) ; // Select Pair I TEMP8 = IoIn8(LANBP_BASE_ADDR) | 0x40; IoOut8(LANBP_BASE_ADDR, TEMP8); EXE_SET(); // Execute Set Set Watch Dog as LAN3 & 4 By Pass mode VOID WDT_LAN34_BP() UINT8 TEMP8; SEL_PAIR(0x01) ; // Select Pair II TEMP8 = IoIn8(LANBP_BASE_ADDR) | 0x40;...
  • Page 76 Set Watch Dog as system reset mode VOID WDT_RESET() UINT8 TEMP8; SEL_PAIR(0x00) ; // Select Pair I TEMP8 = IoIn8(LANBP_BASE_ADDR) & 0xBF; IoOut8(LANBP_BASE_ADDR, TEMP8); SEL_PAIR(0x00) ; // Select Pair II IoOut8(LANBP_BASE_ADDR, TEMP8); EXE_SET(); // Execute Set Appendix C – Standard Firewall Platform Setting...
  • Page 77: Console Redirection

    Console Redirection Console redirection allows you to maintain a system from a remote location by re-directing keyboard input and text output through the serial port. This section will tell you how to use the console redirection. Please insert console cable between on the FWS-2253 and remote client system. Setup BIOS in FWS-2253 BIOS >>...

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