Specifications - Analog Devices AD5934 Manual

AD5934

SPECIFICATIONS

VDD = 3.3 V, MCLK = 16.776 MHz, 2 V p-p output excitation voltage @ 30 kHz, 200 kΩ connected between Pin 5 and Pin 6; feedback
resistor = 200 kΩ connected between Pin 4 and Pin 5; PGA gain = ×1, unless otherwise noted.
Table 1.
Parameter
SYSTEM
Impedance Range
Total System Accuracy
System Impedance Error Drift
TRANSMIT STAGE
2
Output Frequency Range
Output Frequency Resolution
MCLK Frequency
TRANSMIT OUTPUT VOLTAGE
Range 1
AC Output Excitation Voltage
4
DC Bias
DC Output Impedance
Short-Circuit Current to Ground at VOUT
Range 2
AC Output Excitation Voltage
4
DC Bias
DC Output Impedance
Short-Circuit Current to Ground at VOUT
Range 3
AC Output Excitation Voltage
4
DC Bias
DC Output Impedance
Short-Circuit Current to Ground at VOUT
Range 4
AC Output Excitation Voltage
4
DC Bias
DC Output Impedance
Short-Circuit Current to Ground at VOUT
SYSTEM AC CHARACTERISTICS
Signal-to-Noise Ratio
Total Harmonic Distortion
Spurious-Free Dynamic Range
Wide Band (0 MHz to 1 MHz)
Narrow Band (±5 kHz)
Y Version
Min Typ
1 k
0.5
30
1
0.1
3
1.98
1.48
200
±5.8
3
0.97
0.76
2.4
±0.25
3 0.383
0.31
1
±0.20
3
0.198
0.173
600
±0.15
60
−52
−56
−85
Rev. A | Page 4 of 40
1
Max Unit Test Conditions/Comments
10 M Ω 100 Ω to 1 kΩ requires extra buffer circuitry,
see Measuring Small Impedances section
% 2 V p-p output excitation voltage at 30 kHz,
200 kΩ connected between Pin 5 and Pin 6
ppm/°C
100 kHz
Hz <0.1 Hz resolution achievable using
direct digital synthesis (DDS) techniques
16.776 MHz Maximum system clock frequency
V p-p Refer to Figure 4 for output voltage distribution
V DC bias of the ac excitation signal; see Figure 5
Ω T = 25°C
A
mA T = 25°C
A
V p-p See Figure 6
V DC bias of output excitation signal; see Figure 7
kΩ
mA
V p-p See Figure 8
V DC bias of output excitation signal; see Figure 9
kΩ
mA
V p-p See Figure 10
V DC bias of output excitation signal; see Figure 11
Ω
mA
dB
dB
dB
dB