Panasonic KX-TA1232 Service Manual page 32

16 bit CPU (system clock = 12 MHz)
with 68HC000 core CPU
3 Serial I/O ports
16 bit Paralleled I/O ports
3 level Interrupt Controller
16 bit Timer 3 ch.
Address Decoder
DTACK Controller
8M bit EPROM (Program)
4M bit SRAM
Address Buffer
Data Buffer
Control Signal Buffer
Gate Array
with Address Decoder
Peripheral Controller
2 Paralleled Out Ports
X'tal (12 MHz)
Composition:
The CPU (IC1) controls the system according to the programs stored in the ROM (IC20, 21). Part
of the RAM (IC24, 25) area is backed up by batteries and stores the system data.
TSW Circuit
(IC1)
(IC20, 21)
(IC24, 25)
(IC33, 34)
(IC31)
(IC32, 35)
(IC2)
(X1)
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