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SLAS764 – MAY 2011
TERMINAL FUNCTIONS, PCM510x
PCM5100 (HDMI:U1052)
TERMINAL
NAME
CPVDD
CAPP
CPGND
CAPM
VNEG
OUTL
OUTR
AVDD
AGND
DEMP
FLT
SCK
BCK
DIN
LRCK
PCM5100, PCM5101, PCM5102
FMT
XSMT
SLAS764 – MAY 2011
LDOO
DGND
Part Number
DVDD
(1) Failsafe LVCMOS Schmitt trigger input
spacer
PCM5100 Block Diagram
6
DEVICE INFORMATION
PCM510X (top view)
Table 2. TERMINAL FUNCTIONS, PCM510x
I/O
DESCRIPTION
NO.
1
-
Charge pump power supply, 3.3V
2
O
Charge pump flying capacitor terminal for positive rail
3
-
Charge pump ground
4
O
Charge pump flying capacitor terminal for negative rail
5
O
Negative charge pump rail terminal for decoupling, -3.3V
6
O
Analog output from DAC left channel
7
O
Analog output from DAC right channel
8
-
Analog power supply, 3.3V
9
-
Analog ground
10
I
De-emphasis control for 44.1kHz sampling rate
11
I
Filter select : Normal latency (Low) / Low latency (High)
12
I
System clock input
13
I
Audio data bit clock input
14
I
Audio data input
15
I
Audio data word clock input
16
I
Audio format selection : I
17
I
Soft mute control : Soft mute (Low) / soft un-mute (High)
18
-
Internal logic supply rail terminal for decoupling
Table 1. Differences Between PCM510x Devices
19
-
Digital ground
20
-
Digital power supply, 3.3V
PCM5102
PCM5101
PCM5100
DIN (i2s)
Zero
Data
Detector
Clock Halt
Detection
LRCK
BCK
PLL Clock
MCK
UVP/Reset
Figure 1. PCM510x Functional Block Diagram
2
S (Low) / Left justified (High)
Dynamic Range
112dB
106dB
100dB
Current
Segment
DAC
Current
Segment
DAC
Advanced Mute Control
PCM510x
POR
Ch. Pump
153
(1)
: Off (Low) / On (High)
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SNR
THD
112dB
–93dB
106dB
–92dB
100dB
–90dB
LINE OUT
CPVDD (3.3V)
Copyright © 2011, Texas Instruments Incorporated
AVDD (3.3V)
Power
Supply
DVDD (3.3V)
GND
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