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Summary of Contents for rtd DM35418HR
- Page 1 DM35418HR/DM35218HR PCI Express Data Acquisition Board User’s Manual BDM-610010041 Rev F RTD Embedded Technologies, Inc. AS9100 and ISO 9001 Certified...
- Page 2 RTD Embedded Technologies, Inc. 103 Innovation Boulevard State College, PA 16803 USA Telephone: 814-234-8087 Fax: 814-234-5218 www.rtd.com sales@rtd.com techsupport@rtd.com DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F...
- Page 3 Failure to follow the instructions found in this manual may result in damage to the product described in this manual, or other components of the system. The procedure set forth in this manual shall only be performed by persons qualified to service electronic equipment. Contents and specifications within this manual are given without warranty, and are subject to change without notice. RTD Embedded Technologies, Inc. shall not by persons qualified to service electronic equipment.
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Page 4: Table Of Contents
Digital I/O Connector - 37-pin High Density “D” Female Connector 4.3.3 Bus Connectors CN1(Top) & CN2(Bottom): PCIe Connector Steps for Installing ..................................26 Functional Description Block Diagram................................... 27 FPGA with DMA Engine ................................27 DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... - Page 5 FB_ID (Read-Only) 6.3.2 FB_DMA_CHANNELS (Read -Only) 6.3.3 FB_DMA_BUFFERS (Read-Only) BAR2: Analog to Digital Converter (ADC) ..........................40 6.4.1 Function Block Register Map 6.4.2 Mode_Status (Read/Write, Read-Only) 6.4.3 CLK_SRC (Read/Write) DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F...
- Page 6 6.8.5 ENABLE (Read/Write) 6.8.6 SB_ n_CLK_SRC (Read/Write) 6.8.7 DIRECTION (Read/Write) 6.8.8 CLK_SRC_GBLn Troubleshooting Additional Information PC/104 Specifications ................................54 PCI and PCI Express Specification ............................54 Limited Warranty DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F...
- Page 7 Figure 5: Example 104™Stack ....................................18 Figure 6: IDAN Dimensions ....................................19 Figure 7: Example IDAN System .................................... 26 Figure 8: DM35418HR/DM35218HR Block Diagram ............................. 27 Figure 9: Analog Input Front End .................................... 29 Figure 10: Bipolar Single-Ended Example ................................30 Figure 11: Bipolar Differential Example ..................................
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Page 8: Introduction
Software selectable termination Digital I/O 32-bit port of digital I/O Bit programmable direction 5V Tolerant TTL Signaling level Ordering Information The DM35418HR/DM35218HR is available with the following options: Table 1: Ordering Options Part Number Description DM35418HR PCIe/104 Analog I/O dataModule DM35218HR... -
Page 9: Contact Information
If you are having problems with your system, please try the steps in the Troubleshooting section of this manual on page 53. For help with this product, or any other product made by RTD, you can contact RTD Embedded Technologies technical support via the following methods: Phone: 1-814-234-8087 Monday through Friday, 8:00am to 5:00pm (EST). -
Page 10: Specifications
@ -8dB Noise Free Bits Inputs Grounded 14.19 Bits Differential Inputs, ±10V Gains 0.5,1,2,4,8 Digital to Analog Converter Full-scale Analog Output Voltage -2.5 +2.49998 Resolution Bits Relative Accuracy ±2 DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 11: Functional Characteristics
Measured running ADC continuous DMA example. All channels sampling at max rate and DAC outputs were looped back to ADC inputs. Functional Characteristics Table 4: Functional Characteristics Symbol Parameter Value Unit GBC_SYS_CLK_FREQ System Clock Frequency Analog to Digital FIFO Size D-Words Digital to Analog FIFO Size D-Words DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 12: Analog Input Histograms
In Figure 2 you can see a histogram of samples from sampling a grounded input in +/-10 V, differential input range. The number of samples is 131072. 2000 1780 1712 1800 1571 1600 1400 1200 1008 1027 1000 -11 -10 Figure 2: Histogram DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 13: Board Connection
When removing it from the bag, hold the board at the edges, and do not touch the components or connectors. Handle the board in an antistatic environment, and use a grounded workbench for testing and handling of your hardware. Physical Characteristics STEP model is available upon request; contact RTD Tech Support for more information. Weight: Approximately 99.8 g (0.22 lbs) with heatsink ... -
Page 14: Connectors And Jumpers
The PCIe connector is the connection to the system CPU. The position and pin assignments are compliant with the PCI/104-Express Specification. (See PC/104 Specifications on page 54) The DM35418HR/DM35218HR is a “Universal” board, and can connect to either a Type 1 or Type 2 PCIe/104 connector. DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. -
Page 15: External I/O Connectors
DIO0.23 DIO0.22 DIO0.25 DIO0.24 DIO0.27 DIO0.26 DIO0.29 DIO0.28 DIO0.31 DIO0.30 +3.3V +3.3V 5V optional output at pin. Does not affect DIO Levels. Contact RTD Sales for more information DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 16: Cn4: Analog I/O Connector
Table 8: CN5 Pin-out SYNC0- SYNC0+ SYNC1- SYNC1+ SYNC2-- SYNC2+ SYNC3- SYNC3+ Other Connectors CN6 are for Factory Use only 3.3.3 UMPERS There are no jumpers on the board. DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 17: Leds
This LED is used to indicate which clock is being used. The LED is on when the SYNCBUS is being used as the clock. The LED is off when the onboard oscillator is being used. DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 18: Steps For Installing
11. Re-connect the power cord and apply power to the stack. 12. Boot the system and verify that all of the hardware is working properly. Figure 5: Example 104™Stack DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 19: Idan Connections
Dimensions: 152 mm L x 130 mm W x 17 mm H (5.98 in L x 5.12 in W x 0.67 in H) Figure 6: IDAN Dimensions DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 20: Dm35418 External I/O Connectors
SYNC1- ADC6.0+ SYNC2+ ADC6.0- SYNC2- ADC7.0+ SYNC3+ ADC7.0- SYNC3- DAC0.0 Analog voltage rail can supply up to 1A. Customer must ensure that the current limit is not exceeded. DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 21: Analog I/O And Syncbus Connector - 62-Pin High Density "D" Female Connector
DAC0.0 ADC1.0+ DAC3.0 ADC3.0- DAC6.0 ADC4.0+ SYNC3+ ADC6.0- SYNC2+ ADC7.0+ Analog voltage rail can supply up to 1A. Customer must ensure that the current limit is not exceeded. DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 22: Digital I/O Connector - 37-Pin High Density "D" Female Connector
DIO0.10 DIO0.12 DIO0.14 DIO0.16 DIO0.18 DIO0.20 DIO0.22 DIO0.24 DIO0.26 DIO0.28 DIO0.30 +3.3V DIO0.1 DIO0.3 DIO0.5 DIO0.7 DIO0.9 DIO0.11 DIO0.13 DIO0.15 DIO0.17 DIO0.19 DIO0.21 DIO0.23 DIO0.25 DIO0.27 DIO0.29 DIO0.31 DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 23: Dm35218 External I/O Connectors
SYNC1- Reserved SYNC2+ Reserved SYNC2- Reserved SYNC3+ Reserved SYNC3- DAC0.0 Analog voltage rail can supply up to 1A. Customer must ensure that the current limit is not exceeded. DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 24: Analog I/O And Syncbus Connector - 62-Pin High Density "D" Female Connector
DAC0.0 ADC1.0+ DAC3.0 ADC3.0- Reserved Reserved SYNC3+ Reserved SYNC2+ Reserved Analog voltage rail can supply up to 1A. Customer must ensure that the current limit is not exceeded. DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 25: Digital I/O Connector - 37-Pin High Density "D" Female Connector
DIO0.10 DIO0.12 DIO0.14 DIO0.16 DIO0.18 DIO0.20 DIO0.22 DIO0.24 DIO0.26 DIO0.28 DIO0.30 +3.3V DIO0.1 DIO0.3 DIO0.5 DIO0.7 DIO0.9 DIO0.11 DIO0.13 DIO0.15 DIO0.17 DIO0.19 DIO0.21 DIO0.23 DIO0.25 DIO0.27 DIO0.29 DIO0.31 DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 26: Bus Connectors
Specification. (See PC/104 Specifications on page 54) The DM35418HR/DM35218HR is a “Universal” board, and can connect to either a Type 1 or Type 2 PCIe/104 connector. Steps for Installing Always work at an ESD protected workstation, and wear a grounded wrist-strap. -
Page 27: Functional Description
Functional Description Block Diagram The Figure below shows the functional block diagram of the DM35418HR/DM35218HR. The various parts of the block diagram are discussed in the following sections. PCIe x1 FPGA PCIe Switch Analog output with …. 1Msample/s PCIe x1... -
Page 28: Digital I/O
In most cases, the board ground must still be attached to the device that is generating the input signal. Full-Scale Input Range The DM35418HR/DM35218HR has a programmable gain input per channel. This gain can be programed for 1,2,4,8 to achieve input ranges ±5V, ±2.5V, ±1.25V, ±0.625V. -
Page 29: Initializing The Adc Converter
IMPLIFIED BLOCK DIAGRAM OF ANALOG INPUT The following figure shows the front end circuit for the DM35418HR/DM35218HR. It also shows the names of the FPGA registers in bold and the different ways the front-end can be configured for different modes of operation. -
Page 30: Input Connection Examples
0, 0 +15V A1 A0 -> G Gain VREF in - CHn_Front_End_Config [BIP_UNI] -15V VREF: 0V: [BIP_UNI] = 0 CHn_Front_End_Config [SE_DIFF] = 1 -10V Figure 11: Bipolar Differential Example DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 31: 5.4.3.3. Single Ended, Unipolar, 0-10V Full-Scale Range
+15V A1 A0 -> G Gain VREF CHn_Front_End_Config CHn_Front_End_Config [SE_DIFF] = 1 [BIP_UNI] -15V VREF: -5V: [BIP_UNI] = 1 External Ground Reference Resistor Figure 13: Unipolar Differential Example DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 32: 5.4.3.5. Adc Gain And Offset Test
Analog output The DM35418HR/DM35218HR feature 4/8 independent 16-bit analog output channels with individually programmable output ranges of ±2.5V, ±5V, and ±10V. Each channel supports a maximum update rate 1 MHz and a maximum operating load of 5mA. Each channel has less than 1 Ω of output impedance. -
Page 33: Simplified Block Diagram Of Analog Output
0.0763 1000 0000 0000 0001 0.1526 0.3052 0.00 1000 0000 0000 0000 0.00 0.00 -0.0763 0111 1111 1111 1111 +0.1526 -0.3052 -2500.00 0000 0000 0000 0000 -5000.00 -10000.00 DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 34: Register Address Space
‘0’. This is typically used for interrupt status registers. Read Only: This register can only be read. NOTE: Writing to Read-Only registers may have unexpected results. Function Block Mapping Below is the Function Block slot mapping for the DM35418HR/DM35218HR Table 18: Function Block Mapping Slot Description Connector... -
Page 35: Bar0: General Board Control
The measured frequency of the system clock. Units are 10 kHz, i.e. (Frequency in Hertz) = (GBC_SYS_CLK_FREQ * 10 kHz). This is measured once after any reset, including GBC_BRD_RST. This value is not available (will read 0) until 100us after reset. DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 36: Gbc_User_Id (Read Only)
_DMA (R FFSET This is the offset from the beginning of the Functional Block section (typically the offset in BAR2) that the Functional Block DMA Registers resides in. DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 37: Bar2: Functional Block Standard Dma
Used_Desc bit (below) if the next buffer has the Used bit set. However, it will not generate an interrupt, and will not PAUSE the DMA engine. Examples are continuous output from a DAC, or very large Pre-trigger buffering using system memory. DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 38: Fb_Dmam_Stat_Used (Read/Write)
This is the size in bytes of the buffer for DMA Channel m, buffer n. It must be an integer number of double-words (i.e. b[1:0] are reserved). The actual size is FB_DMAm_SIZEn + 4 Bytes. The maximum buffer size is 16MB. DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 39: Fb_Dmam_Ctrln (Read/Write)
FB_DMA_CHANNELS (R This register contains the number of DMA Channels in this Function Block. 6.3.3 FB_DMA_BUFFERS (R This register contains the number of Buffer Descriptors in each DMA Channel. DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 40: Bar2: Analog To Digital Converter (Adc)
0x03: Go, Re-arm. After filling the buffer with the Post-Stop samples and the FIFO is empty, the triggering state machine is restarted, i.e. FIFO is filled with Pre-Start samples and waits for a start trigger. DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 41: Clk_Src (Read/Write)
The current value of the Clock Divide Counter. This counter starts at a value of CLK_DIV, and counts down. When it reaches zero, a sample is taken. This is useful when using a slow sample clock. DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 42: Pre_Trigger_Capture (Read/Write)
0x86: Sampling has completed and the FIFO is empty (all data transferred to host) o 0x87: Pacer – The pacer clock has ticked. 6.4.14 AD_CONFIG (M ASKABLE RITE Not used. DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 43: Front_End_Config (Maskable Read/Write)
The response of the filter is shown in the Figure 16below. The Table below shows the -3dB cutoff for each of the filter settings. Both the figure and the table are relative to the sample rate (f Figure 16: Filter Response with each ORDER Value DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 44: Int_Stat(Read/Clear)
ADC range unexpected results will occur. 6.4.22 CH_LAST_SAMPLE (R The last sample read from the ADC Converter, after filtering. This is the same value that is written to the DMA FIFO. DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 45: Bar2: Digital To Analog Converter (Dac)
RESET in order to convert more values. 0x03: Go, Re-arm. After converting the Post-Stop number of values, the triggering state machine is restarted. DAC data is resumed from that last value sent. DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 46: Clk_Src (Read/Write)
The current value of the Clock Divide Counter. This counter starts at a value of CLK_DIV, and counts down. When it reaches zero, a sample is taken. This is useful when using a slow sample clock. DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 47: Post_Stop_Conversions (Read/Write)
B[1:0]: PGA_A[1:0] PGA_A[1:0]: 00: Gain of 1 PGA_A[1:0]: 01: Gain of 2 PGA_A[1:0]: 10: Gain of 4 Table 24: DAC Full-Scale Settings PGA_A[1 Gain Range ±2.5V ±5V ±10V DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 48: Chn_Fifo_Data_Cnt (Read)
B[15:0]: DAC Data If the current Mode is “Reset” or the associated DMA engine is set to “Clear”, a write to this register will immediately update the DAC Converter. DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 49: Bar2: Digital I/O (Dio)
The value to be output if the pins are configured as output. Bit assignments are the same as above. 6.6.4 DIO_DIRECTION (R RITE Selects the direction of the I/O bit. 0=input, 1=output. Bit assignments are the same as above. All pins default to inputs at power-up. DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 50: Bar2: Temperature Sensor
The current value on the temperature sensor as a signed 16-bit integer. B[2:0] of this register always read ‘0’. See the equation and table below for converting register value to temperature. ���������������������� = ���������������� ���������� ∗ 0.0078125 �� Temperature (ºC) Register Value 0x4B00 0x3E80 0x0C80 0.0625 0x0008 0x0000 -0.0625 0xFFF8 0xF380 0xE480 DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 51: Bar2: Syncbus Driver
Select if the SyncBus driver is enable. When the SyncBus driver is disabled, the transceiver is powered down and SyncBus will not receive or transmit. This bit must be enabled in order to use the SyncBus. B0: Enable SyncBus driver, 0 = disabled (low power), 1 = enabled. DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 52: Sb_ N_Clk_Src (Read/Write)
6.8.8 CLK_SRC_GBL Selects the source to drive onto Clock Bus signal N. Values are: B[7:0] Clock Source Select 0x00: Disable Clock Source 0x80: CLK_EVENT_SYNCBUS_0 0x81: CLK_EVENT_SYNCBUS_1 0x82: CLK_EVENT_SYNCBUS_2 DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 53: Troubleshooting
If problems persist, or you have questions about configuring this product, contact RTD Embedded Technologies via the following methods: Phone: +1-814-234-8087 E-Mail: techsupport@rtd.com Be sure to check the RTD web site (http://www.rtd.com) frequently for product updates, including newer versions of the board manual and application software. DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. -
Page 54: Additional Information
PCI and PCI Express Specification A copy of the latest PCI and PCI Express specifications can be found on the webpage for the PCI Special Interest Group: www.pcisig.com DM35418HR/DM35218HR | www.rtd.com User’s Manual RTD Embedded Technologies, Inc. BDM-610010041 Rev F... -
Page 55: Limited Warranty
During the one year warranty period, RTD Embedded Technologies will repair or replace, at its option, any defective products or parts at no additional charge, provided that the product is returned, shipping prepaid, to RTD Embedded Technologies. All replaced parts and products become the property of RTD Embedded Technologies. - Page 56 RTD Embedded Technologies, Inc. 103 Innovation Boulevard State College, PA 16803 USA Telephone: 814-234-8087 Fax: 814-234-5218 www.rtd.com sales@rtd.com techsupport@rtd.com Copyright 2016 by RTD Embedded Technologies, Inc. All rights reserved.
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