Toshiba GR200 Series Instruction Manual page 166

From EF (EF2)
DEFCR
-CX
From VTF
VTF_DETECT
From PROT COMMON
CB_LOSS_PHASE
From EF (EF1)
DEFCF
-CX
From PROT-COMMON
OCD-AT S
-CX
R
OCT-BT
S
-CX
R
OCT-C
S
-CX
R
1
800000EBBB EFF PHSEL-A
800000EBBC EFF PHSEL-B
800000EBBD EFF PHSEL-C
Figure 2.4-8 OCD circuit for BOP
DEFCF-AX
DEFCF-BX
DEFCF-CX
Permission signals received:
From Terminal 1
Integral DEFCAR-R1-A
=1
≥1
Integral DEFCAR-R1-B
=1
≥1
Integral DEFCAR-R1-C
=1 ≥1
External DEFCAR-R1
=1
From Terminal 2
Integral DEFCAR-R2-A
Integral DEFCAR-R2-A
=1 ≥1
Integral DEFCAR-R2-B
=1 ≥1
Integral DEFCAR-R2-C
=1
≥1
External DEFCAR-R2
=1
DEFCAR
BOP
From Terminal 2
CH1-USE 1
CH2-USE
CAR_BLOCK
≥1
800000EBB0 DEFCAR_BLK
810000EBC1 DEFCAR_3PTP
800000EBC0 DEFCAR_ARCBLOCK
Figure 2.4-9 BOP scheme logic
TDEFCB
&
0.00 to 0.30s
≥1
1
TDEFCF
t 0
&
&
t 0
&
&
&
t 0
≥1
&
≥1
0.00 to 0.30s
≥1
≥1
≥1
≥1
≥1
1
TCHD-DEF
TDEFC
t 0
t 0
&
&
t 0
t 0
&
&
t 0
t 0
&
&
0.00 to 0.100s
0.00 to 0.30s
Week infeed
trip logic
Current
1
Reversal
detection
logic
≥1
&
≥1
&
≥1
&
≥1
≥1
≥1
1
- 145 -
To CRL
8400001B68
DEFCR-X
t 0
8300001B67
≥1
DEFCF-X
8000001B64
DEFCF-AX
8100001B65
DEFCF-BX
8200001B66
DEFCF-CX
8000001B74
&
8100001B75
&
8200001B76
&
8000001B6A
8000001B20
≥1
8100001B6B
≥1
8100001B21
≥1
8200001B6C
≥1
8200001B22
≥1
≥1
≥1
&
≥1
DEFCAR_TPMD
3P
1P
8100001B77
&
≥1
DEFCAR-ARCBlk
Block
6F2S1915 (0.46)
DEFCAR-OPT-A
DEFCAR-OPT-B
DEFCAR-OPT-C
DEFCAR-TRIP-A
DEFCAR-TRIP-B
DEFCAR-TRIP-C
DEFCAR-ARC-BLOCK
To TRC
DEFCAR_PERM1-A
DEFCAR_PERM1-B
DEFCAR_PERM1-C
DEFCAR_PERM2-A
DEFCAR_PERM2-B
DEFCAR_PERM2-C
To ECHO/EIKT
GRZ200 (Soft 031 & 032)