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3.2.2
Data Interface
The displays accept either serial or parallel input data and control codes. Internal logic can interface to
either Intel and Motorola processors and emulate equivalent Hitachi 44780 LCD features.
3.2.2.1 Serial
Input Levels
Baud Rate
Data Word
Parity
Error Indicator
Format:
+V
–V
3.2.2.2 Parallel
Input Levels
Output Levels
Pull–ups
3.2.3
Personality Interface
A strip connector on the circuit card allows user selection of Baud Rate, Interface Mode and Start–up Mode.
The illustration below matches the appearance of the jumper strip on the circuit card.
9600
Jumpers positions are shown above for the default position. If not installed, the default setting is
automatically selected.
Industrial Electronic Engineers, Inc.
Van Nuys, California
04/10/02
High (space/logic 0)
Low (mark/logic 1)
Selectable—1200, 9600 or 19200. Maximum available baud rate depends on execution
times. (See Table 3–5)
10 Bits. Eight Data Bits with start bit and 1 stop bit.
None
If the operating software detects either speed or framing errors during data transmission,
each error character received is replaced on the display screen with the symbol # (ASCII
23h).
(LSB)
D
D
0
1
START
BIT
High
> 3.5 Vdc @ 5.0 A maximum
Low
< 1.5 Vdc @ 0.5 mA maximum
High
> 4.6 Vdc @ 5 mA maximum
Low
< 0.4 Vdc @ 5 mA maximum
Parallel I/O lines are pulled up to +5 Vdc by internal 10 k
19200
1200
+3 Volts to +15 Volts
–3 Volts to –15 Volts.
D
D
D
2
3
4
8 DATA BITS
INTEL
LCD
MOT
SIZE
CODE IDENT NO.
A
05464
SCALE
N/A
(Conforms to EIA-232 specification).
(MSB)
D
D
D
5
6
7
resistors.
SFTST
NORM
S036X2–XXX–XXXXX
SHEET
N
REV
STOP
BIT
18 of 49
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