Digital(Sub Cpu) Schematic Diagram - JVC HM-DH40000K Service Manual

DIGITAL (SUB CPU) SCHEMATIC DIAGRAM
DIGITAL
( SUB CPU )
5
4
TO SUB CPU
AL5V
AL3.3V[D]
GND
TO DMAIN IF
SW12V
SW5V
PS3.3V[A]
GND
TO DMAIN
SW12V
SW5V
AL3.3V[D]
PS3.3V[A]
GND
TO MEMORY
AL5V
AL3.3V[D]
3
GND
TO E5 DDR
AL3.3V[D]
AL2.5V[D]
GND
TO E5
AL3.3V[D]
AL2.5V[D]
AL1.8V[D]
GND
TO VIDEO
PS3.3V[A]
PS3.3V[D]
SW12V
SW5V
GND
TO AUDIO
AUDIO[-]
SW5V
GND
PS3.3V[D]
2
AL5V
CN8001
QGA2001F2-04W
SW12V
TO MAIN
GND
(SW.REG)
CN5602 SW5V
AUDIO[-]
TO MAIN
(SW.REG)
CN5601
CN8002
QGA2001F2-12W
AL3.3V
AL3.3V
AL1.8V
AL1.8V
AL5V
PS3.3V
GND
GND
GND
GND
AL2.5V
AL2.5V
1
A
2-25
C33
0.1
LC1
PELN1148-223X
C2
0.1
C1 C5
47 /16 47 /16
C3 C4
C6
100 0.1
0.1
/6.3
LC2 PELN1148-223X
LC3
PELN1148-223X
LC5
PELN1148-223X
LC6
PELN1148-223X
LC7
PELN1148-223X
C14
C13
0.1
T
47 /6.3
C12 C9
C11
0.1 47
T
47
C15 /6.3
/6.3
47
C16
/6.3
0.1
LC8
PELN1148-223X
R46
OPEN
C34
R45 0.1
OPEN
RA1
10K
RA2
10K
RA3
10K
RA4
10K
T
C17 C18
47 0.1
/6.3
LC4
R1
PELN1148-223X
150k
R2
91k
IC2
R3 1k SI-3012LU-X
T
C10 C7 C8
0.1 47 0.1
/6.3
B
SIO_UART1_TX
C35
OPEN
C32
0.1
R44
10K
BC_D[0] BC_D[0]
D16
BC_D[1] BC_D[1]
D17
BC_D[2] BC_D[2]
D18
BC_D[3] BC_D[3]
D19
BC_D[4] BC_D[4]
D20
BC_D[5] BC_D[5]
D21
BC_D[6] BC_D[6]
D22
BC_D[7] BC_D[7]
D23
VSS
BC_D[8] BC_D[8]
D24
BC_D[9] BC_D[9]
D25
BC_D[10] BC_D[10]
D26
BC_D[11] BC_D[11]
D27
BC_D[12] BC_D[12]
D28
BC_D[13] BC_D[13]
D29
BC_D[14] BC_D[14]
D30
BC_D[15] BC_D[15]
D31
A00
BC_A[0]
A01
C19 BC_A[1]
0.1 A02
BC_A[2]
A03
BC_A[3]
A04
BC_A[4]
A05
BC_A[5]
A06
BC_A[6]
A07
VSS
VCC
BC_A[7]
A08
BC_A[8]
A09
BC_A[9]
A10
BC_A[10]
A11
BC_A[11]
A12
BC_A[12]
A13
BC_A[13]
A14
BC_A[14]
A15
P60/A16
FSC_H
R98
OPEN
C
R88
OPEN
Vcc
TC74VHC05FT
B4
OPEN
C31
0.1
IC1
MB91154PFV107
MB91F154PFV107
MB91F155PFV107
C22 C23
10p 10p
C21
0.1
K1
C20
PELN0984-150Y
0.1
D