Sony SRF-R405 Service Manual page 8

Fm stereo/am pll synthesized radio
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4-4. IC PIN FUNCTION
• IC506 µPD17073GB-921-9EU (System Control, LCD Drive)
Pin No.
Pin Name
I/O
Description
1
DATA OUT
O
Serial data output terminal (Not used: open)
2
EEPROM CS
O
Chip selection output to EEPROM (Not used: open)
3
TV 4-12CH
O
Band switching output "H": TV (4 to 12 channels), "L": FM/TV (1 to 3 channels)/AM (Not used: open)
4
MUTE
O
Audio mute signal output
5
NC
Not used (Ground)
6
POWER
O
Power ON/OFF control output
7
KS0
O
Key strobe signal output. *1
8
KS1
O
Key strobe signal output. *1
9
KS2
O
Key strobe signal output. *1
10
KS3
O
Key strobe signal output. *1
11
KR0
I
Key return signal input. *1
12
NC
Not used (Ground)
13
KR1
I
Key return signal input. *1
14
KR2
I
Key return signal input. *1
15
KR3
I
Key return signal input. *1
16
POC0
O
Meter drive signal output (Not used: ground)
17
POC1
O
TV mode control signal output (Not used: ground)
18
V DET2
I
Low power voltage detection input (Not used: ground)
19
BAND
O
Band switching signal output "H": AM, "L": FM/TV (1 to 3 channels)
20
GND
Ground (Ground)
21
GND
Ground (Ground)
22
EO
O
PLL error signal output to PLL low-pass filter (Q401, 402)
23
VCOL
I
VCO input from FM/TV (1 to 3 channels)/AM local oscillator
24
VCOH
I
VCO input from TV (4 to 12 channels) local oscillator (Not used: open)
25
REG0
Terminal to which external capacitor for the circuit to generate the LCD drive voltage, is connected
26
VDD
Power supply input (3 V)
27
VDD
I
Power supply input (3 V)
28
X OUT
O
System clock output (75 kHz)
29
X IN
System clock input (75 kHz)
30
REG 1
Terminal to which external capacitor for the circuit to generate the LCD drive voltage, is connected
31
REG LCD0
Terminal to which external capacitor for the circuit to generate the LCD drive voltage, is connected
32
CAP LCD0
Terminal to which external capacitor for the circuit to generate the LCD drive voltage, is connected
33
CAP2 LCD1
Terminal to which external capacitor for the circuit to generate the LCD drive voltage, is connected
34
REG LCD1
O
Terminal to which external capacitor for the circuit to generate the LCD drive voltage, is connected
35
COM0
O
Common signal output to LCD
36
COM1
O
Common signal output to LCD
37
COM2
Common signal output to LCD
38
NC
O
Not used (Ground)
39
COM3
O
Common signal output to LCD
40
LCD0
O
Segment signal output to LCD
41
LCD1
O
Segment signal output to LCD
42
LCD2
O
Segment signal output to LCD
43
LCD3
O
Segment signal output to LCD
44
LCD4
O
Segment signal output to LCD
45
NC
Not used (Ground)
46
LCD5
O
Segment signal output to LCD
47
LCD6
O
Segment signal output to LCD
48
LCD7
O
Segment signal output to LCD
49
LCD8
O
Segment signal output to LCD
50
LCD9
O
Segment signal output to LCD
— 12 —
Pin No.
Pin Name
I/O
Description
51
LCD10
O
Segment signal output to LCD
52
LCD11
O
Segment signal output to LCD
53
LCD12
O
Segment signal output to LCD
54
NC
Not used (Open)
55
LCD13
O
Segment signal output to LCD
56
LCD14
O
Segment signal output to LCD
57
VDET1
I
Low power voltage detection input. "L": 1.9 V or less (Entering the clock mode)
58
HOLD
I
Hold switch (S401) input detection terminal "L": hold
59
NC
Not used (Open)
60
BEEP
O
Beep sound signal output
61
NOISE CUT
O
Noise filter circuit control signal output
62
LCD STB
Not used (Open)
63
CLK
Detection input (High level)
64
DATA IN
I
2 band/3 band detection input
*1
Key Matrix
KS0(7 pin)
KS1(8 pin)
KS2(9 pin)
KS3(0 pin)
KR0
S502
S506
S509-1
S510
(!¡ pin)
1
POWER
ENT/BAND
5
KR1
S503
S507
S509-2
–––––
(!£ pin)
4
NOISE CUT
(JOG SW–)
KR2
S504
S511
–––––
–––––
(!¢ pin)
2
6
S509-3
S512
KR3
S505
S508
(JOG SW+)
7
(!∞ pin)
3
SETTING
• IC BLOCK DIAGRAMS
IC503 S-80819ANNP
IC201 CXA1111N
IC505 S-80821ANNP
24
23
4 Vss
VREF
BAND SIGNAL
OUTPUT CIRCUIT
+
OUT
1
VDD
2
3
NC
1
2
— 13 —
IC401 CXA1522N
16
1
IC301 LA3335M
10
1
22
21
20
19
18
17
16
15
14
13
RIPPLE
REGULATOR
FILTER
AM . IF
DET . AGC
FM . IF
DISCRI
TUNING
METER
AM . FE
FM . FE
3
4
5
6
7
8
9
10
11
12
15
14
13
12
11
10
9
PRE+POWER 1
REG
VOL
PRE+POWER 2
2
3
4
5
6
7
8
9
8
7
6
LAMP
DECODER
SYNC
TRIGGER
DET
STEREO
SWITCH
FF 90º
FF 1/2
FF 0º
PHASE
V.C.O
VCO STOP
COMPALATE
2
3
4
5
— 14 —

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