Pci, Cache And Memory Controller (82437Fx) - HP Vectra VL5 4 Technical Reference Manual

PCI, CACHE AND MEMORY CONTROLLER (82437FX)

The 82437FX device integrates cache and memory control functions and provides bus control
functions for the transfer of information between the microprocessor, cache, main memory and
the PCI bus. The cache controller supports the Pentium Cache Write-Back mode and 256 KB
of direct mapped, write-back level-two cache, using synchronous pipeline burst SRAMs.
82437FX Feature Summary
Function
Cache controller
Write buffer
*The Pentium's internal cache has a 32-byte line size, which is four times the width of the Pentium's
host data bus. Burst reads and writes by the Pentium involve a full cache line, and so require four
back-to-back cycles to complete. The first cycle in each burst of four always requires more time to
complete than the three subsequent cycles. This is because the first cycle includes the addressing
phase and precharge timing (for memory).
Features
• Direct mapped organization
• Buffered write-back
• External cache tags
• 32-byte line size
• Uses synchronous pipeline burst SRAM
• Supports 3-1-1-1* burst reads
• Buffers all processor writes to main memory
• Buffers memory writes to PCI for selected memory regions
• Supports 3-1-1-1* write access timing