Table Of Contents - HP Vectra VL5 4 Technical Reference Manual

Table of Contents

NOTICE
PREFACE
ORDERING INFORMATION FOR THE PHOENIX BIOS MANUAL
CONVENTIONS
BIBLIOGRAPHY
1 SYSTEM OVERVIEW
SYSTEM OVERVIEW
HP VECTRA VL 5/XX SERIES 3 - VL 5/XX SERIES 4 COMPARISON
HP VECTRA VL 5/XX SERIES 4 DESKTOP - MINI-TOWER
COMPARISON
VL 5/XX SERIES 4 PC BLOCK DIAGRAM
PRINCIPAL COMPONENTS AND FEATURES
VL 5/XX SERIES 4 SYSTEM BOARD
VL 5/XX MT SERIES 4 DESKTOP BACKPLANE
VL 5/XX MT SERIES 4 MINI-TOWER BACKPLANE
PROCESSOR
SUPERSCALAR ARCHITECTURE
FLOATING POINT UNIT (FPU)
DYNAMIC BRANCH PREDICTION
INSTRUCTION AND DATA CACHE
DATA INTEGRITY
PCI CHIP SET
PCI, CACHE AND MEMORY CONTROLLER (82437FX)
DATA PATH UNIT (82438FX)
THE PCI/ISA BRIDGE AND IDE CONTROLLER (82371FB)
THE 82438FX AND 82371FB FEATURE SUMMARY
SUPER I/O CHIP
NS PC87332VF FEATURE SUMMARY
FLEXIBLE DRIVE CONTROLLER (FDC)
SERIAL/PARALLEL PORTS
GRAPHICS/INTEGRATED VIDEO
IDE TO PCI CONTROLLER
FLASH ROM
SECURITY FEATURES
PHYSICAL CHARACTERISTICS
ELECTRICAL SPECIFICATIONS
POWER AVAILABILITY (CONTINUOUS OPERATION):
ENVIRONMENTAL SPECIFICATIONS
2 SUMMARY OF THE HP/PHOENIX BIOS
HP/PHOENIX BIOS DESCRIPTION
OVERVIEW OF ADDRESS SPACE
I/O ADDRESSES USED BY THE SYSTEM*
BIOS I/O PORT MAP
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