HP Kayak xu700 Technical Reference Manual page 60

2 System Board
Assigned Device Interrupts
Although the Setup program can be used to change some of the settings, the
following address map is not completely BIOS dependent, but is determined
partly by the operating system. Note that some of the interrupts are
allocated dynamically.
Interrupt Source
INTA - PCI slot 3 (32/33)
INTB - PCI slot 3 (32/33)
INTC - PCI slot 3 (32/33)
INTD - PCI slot 3 (32/33)
INTA - PCI slot 4 (32/33)
INTB - PCI slot 4 (32/33)
INTC - PCI slot 4 (32/33)
INTD - PCI slot 4 (32/33)
INTA - onboard SCSI controller
AGP - INTA, PCI Slot 1 - INTC, PCI
Slot 2 - INTA, PCI Slot 5 - INTB
PCI Audio - INTA, AGP - INTB, PCI
Slot 1 - INTD, PCI Slot 2 - INTB,
PCI Slot 5 - INTC
BT_INT, PCI Slot 1 - INTA, PCI
Slot 2 - INTC, PCI Slot 5 - INTD
USB - INTA, PCI Slot 1 - INTB, PCI
Slot 2 - INTD, PCI Slot 5 - INTA
Device on Primary IDE Channel
Device on Secondary IDE Channel
Serial Interrupt from Super I/O
1.
In PIC mode, the Interrupts signaled to the P64H are chained as INTC to the ICH2.
There are three major interrupt modes available:
PIC mode: This mode uses only the "Legacy" interrupt controllers, so that
only one processor can be supported. Because this system has dual
processor capability, this mode is not chosen by default by Windows NT.
However, during Windows NT installation, you have the possibility of
selecting this mode.
60
APIC Controller Interrupt Signalling on
of
Input (PIC mode)
device
P64H IRQ0
P64H IRQ1
P64H IRQ2
P64H IRQ3
P64H IRQ4
P64H IRQ5
P64H IRQ6
P64H IRQ7
P64H IRQ8
ICH2 INTA
ICH2 INTB
ICH2 INTC
ICH2 INTD
ICH2 IRQ14
ICH2 IRQ15
ICH2 SERIRQ
(APIC
1
modes)
BT_INT APIC bus
BT_INT APIC bus
BT_INT APIC bus
BT_INT APIC bus
BT_INT APIC bus
BT_INT APIC bus
BT_INT APIC bus
BT_INT APIC bus
BT_INT APIC bus
INT APIC bus
INT APIC bus
INT APIC bus
INT APIC bus
INT APIC bus
INT APIC bus
INT APIC bus