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Different working mode and pin function of the module can be set by hardware selection on BS0/BS1 pins. (Notice: In this operation, welding is required. Any changes under no guidance from Waveshare will be considered as a waiver of warranty).
share awesome hardware 1.3inch OLED User Manual 2.2. Softwar e configuration Open the project file .\IDE\ OLED.uvproj in Keil, navigate to the following text, delete the ‘//’ (Double slash) before #define INTERFACE_4WIRE_SPI //#define INTERFACE_3WIRE_SPI //3-wire SPI #define INTERFACE_4WIRE_SPI //4-wire SPI //#define INTERFACE_IIC //I2C After compiling successfully, download the project to Open103R development board.
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share awesome hardware 1.3inch OLED User Manual 4-wire SPI and I2C interfaces of SH1106 OLED The 8080-Parallel Interface, 6800-Parallel Interface, Serial Interface (SPI) or I2C Interface can be selected by different selections of IM0~2 as shown in Table 3: Table 3: Different selections of IM0~2 (SH1106_V2.3.pdf Chap.
share awesome hardware 1.3inch OLED User Manual The serial interface is initialized when CS is high. In this state, SCL clock pulse or SDI data have no effect. A falling edge on CS enables the serial interface and indicates the start of data transmission. The SPI is also able to work properly when the CS always keep low, but it is not recommended.
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share awesome hardware 1.3inch OLED User Manual The I2C-bus is for bi-directional, two-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor.
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share awesome hardware 1.3inch OLED User Manual Figure 4: Start and Stop conditions Acknowledge Each byte of eight bits is followed by an acknowledge bit. The acknowledge bit is a HIGH signal put on the bus by the transmitter during which time the master generates an extra acknowledge related clock pulse.
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share awesome hardware 1.3inch OLED User Manual address is set by connecting the input SA0 to either logic 0(VSS) or 1 (VDD1). The I2C-bus protocol is illustrated in Figure 6: I2C Protocol. The sequence is initiated with a START condition (S) from the I2C-bus master that is followed by the slave address.