Advanced Chipset Features - Acorp 4PE800 Manual

Table of Contents

Advertisement

Chapter 2

2.5 Advanced Chipset Features

This section allows you to configure the system based
features of the installed chipset. This chipset manages bus
speeds and access to system memory resources, such as
DRAM and external cache. It also coordinates communica-
tions of the PCI bus. It must be stated that these items should
never be altered. The default settings are set up to provide
the best operating conditions for your system. The time you
might need to make any changes would be if you discover
that data is lost while using your system.
Phoenix - AwardBIOS CMOS Setup Utility
DRAM Timing Selectable
x CAS Latency Time
x Active to Precharge Delay
x DRAM RAS# to CAS# Delay
x DRAM RAS# Precharge
Memory Frequency for
System BIOS Cacheable
Video BIOS Cacheable
Memory Hole At 15M-16M
Delayed Transaction
Delay Prior to Thermal
AGP Aperture Size (MB)
←→↑↓: Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5:Previous Values F6:Fail-Safe Defaults
Advanced Chipset Features
2-41
4PE800 BIOS Setup
Item Help
By SPD
2
6
3
3
Auto
Enabled
Disabled
Disabled
Enabled
16 Min
128MB
F7:Optimized Defaults

Advertisement

Table of Contents
loading

Table of Contents