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Schematic Diagrams
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m
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Sheet 35 of 41
g
i a
APU CORE/ NB
D
CORE
i c
t
a
m
e
h
c
S
.
B
B - 36 APU CORE/ NB CORE
APU CORE/ NB CORE
Offset &
OFS/VFIXEN
SVI
VFIX
Droop
GND
O
O
X
+3.3V
X
X
O
+5V
X
O
X
Meta l VID C odes
SVC
SVD
Output
0
0
1.1
5VS
0
1
1.0
1
0
0.9
1
1
0.8
VFIX EN VID Codes
SVC
SVD
Output
VIN
0
0
1.4
0
1
1.2
1
0
1.0
1
1
0.8
3.3V S
P R 1 1 9
0 _ 0 6
5 VS
P R 1 2 2
* 0 _ 0 6
3 .3VS
PR12 1
1 0K_0 4
P R 1 2 3
* 1 0 K _ 0 6
S G N D 5
PR1 24
*1 0 m il_sh ort
1 9
PWRGD_ VCOR E
APU_ PW RGD_R
P R 1 2 6
* 1 0 m i l _s ho rt
P R 1 2 7
* 1 0 m i l _s ho rt
3
CPU_ SVD
P R 1 3 0
* 1 0 m i l _s ho rt
3
CPU_ SVC
EN_ VCORE
P R 1 3 1
PR1 34
PC16 5
S G N D 5
PR1 33
PR1 32
62 K_ 1%_ 04
54 . 9 K_1% _0 4
2 55 _1 %_0 4
4 70 0p_ 50 V_ X7 R_0 4
P R 1 3 5
1 K _ 1 % _ 0 4
PR1 36
PC16 6
5 4.9 K_ 1%_ 04
1 00 0p _5 0V_X7R_0 4
P R 1 3 7
6 . 8 K_1% _0 4
PC1 67
18 0p_ 50 V_ NPO_0 4
PC168
1 00 0p_ 50 V_ X7 R_0 4
ISP_0
PR1 38
7.5 K_ 1% _0 4
Close to
PR14 1
PR1 40
CPU
10 _0 4
4 .02 K_ 1%_ 04
CPU_VDDCR
socket
ISN_ 0
3
CPU_VDD0_ RUN_F B_H
3
CPU_VDD0 _RUN_ FB_ L
PR14 9
10 _0 4
PR10 9
10 _0 4
NB_VDDCR
CPU_ VDDNB_ RUN_ F B_H 3
CPU_ VDDNB_ RUN_F B_L 3
4
0
_
PR11 0
R
PR11 1
7
10 _0 6
PC13 7
S G N D 5
S G N D 5
10 _0 4
X
4
_
0
V
_
0
UGAT E_ NB
1 u_1 0V_Y 5V_0 6
%
5
1
p _
_
4
0
K
4
0
2
0
_
0
P R11 2
0
2
_
R
1
*1 0mil_s hort
O
7
X
P
PHASE_ NB
_
N
V
SGND5
V _
0
5
0
p _
5
3
1
1
p _
0
4
0
1
1
3
0
R
C
3
1
t
t
PR11 4
6
P
P
r
r
0
o
o
_
h
h
10 _0 6
V
s
s
6
_
5
l
l _
L GATE_NB
4
Y
7
i
i
1
2
V _
4
4
m
m
PR1 16
C
1
1
0
0
8 .2K_1 %_0 4
P
0
C
C
1
1
5
*
*
P
P
_
u
1
0 .
SGND5
PR115
44 .2K_1 %_0 4
PC1 48
7
8
0.22 u_ 16V_ 06
1
1
1
1
R
R
S G N D 5
P
P
8
7
5
2
9
9
6
4
3
1
0
8
7
4
4
4
4
4
4
4
4
4
4
3
3
3
PU9
PR1 20
C
B
B
B
B
B
B
B
B
D
N
B
B
I
C
N
N
N
N
N
N
N
N
N
V
N
_
N
1_1 %_ 06
V
B _
_
T _
_
_
_
E _
_
_
G
T
P
N
N
D
E
E
F
E
T
E
T
S
T
M
E
N
S
S
R
S
A
A
A
O
G
1
F
V
C
G
H
G
3 6
C
P
L
OF S/VF IXEN
O
P
U
BOOT _NB
PR 125
1_ 1% _0 6
2
3 5
P G O O D
BOOT_0
3
3 4
UGAT E_0
PWROK
UGATE_0
Pin 49 is GND Pin
4
3 3
PHASE_ 0
SVD
PHASE_0
5
3 2
SVC
PGND_0
ISL6265C
6
3 1
0 _ 0 6
LGATE_0
ENABL E
LGATE_0
7
3 0
RBIAS
P V C C
8
2 9
OCSET
LGATE_1
9
2 8
VDI FF _ 0
PGND_1
10
2 7
F B_ 0
PHASE_1
11
2 6
COMP_0
UGATE_1
12
2 5
VW_ 0
BOOT_1
0
1
1
1
1
_
_
_
0
_
0
_
F
P
1
1
0
_
N
_
N
1
1
_
_
N
F
_
M
_
_
N
E
N
E
I
P
P
S
T
T
S
B
O
N
S
S
D
W
S
S
I
I
V
R
R
V
V
F
C
V
I
I
3
4
6
9
2
5
7
8
0
1
3
4
1
1
1
1
1
1
1
2
2
2
2
2
ISP_1
ISN_1
PC1 69
0 .1u _5 0V _Y5 V_ 06
t
t
r
r
o
o
h
h
s
s
2
l _
3
l _
4
i
4
i
1
1
m
m
R
0
R
0
P
1
P
1
*
*
P R14 8
1 0 K _1 %_ 04
1 .5V
1 .8VS
3.3VS
R6 82
1 0K_0 4
G
MTN7 00 2Z HS3
Q29
S
D
APU_PW RGD_R
3,1 5
APU_ PW RGD
VIN
8
8
0
0
_
_
R
R
5
1
5
X
X
PC1 40
_
V _
+
V
5
6
7
8
5
9
8
5
3
2
3
2
_
1
1
u _
*3 30 U_2 5V
u
C
2
C
7
4
P
.
P
7
4 .
4
2
3
1
PQ42
MDS26 59
NB_VDDCR
PJ1 9
VDDCR _NB
PL8
T MPC06 03 H -R6 8M-Z 01
10A
1
2
1
2
9
5 .
PR21 7
*
*8 mm
C
6
A
6 .
PD2 0
5 .1_0 6
_
*
+
+
V
PC1 45
6
_
5
6
7
8
6 .
H
V
5
S
V _
.
PQ43
0
2
1 0u _6 .3 V_X5R_0 8
4
5
_
4
MDS26 55
1
PC23 4
2 .
u
A
D
0
2 20 0p_ 50 V_ X7 R_0 4
u _
3
2
3
1
O
4
3
0
3
S
4
4
*
1
6
1
C
5
*
C
C
P
P
8
8
0
P C15 6
PC14 9
PC157
0
5
6
7
8
_
R
R
5
5
*0 . 1 u_ 50 V_ Y5V_0 6
0.1 u_ 50V_ Y5V_0 6
*0.1 u_ 50V_ Y5V_0 6
X
0
X
4
_
1
5
5
V
1
V
5
5
1
2
3
1
PQ44
C
2
2
C
P
u _
P
MDS26 59
u
7
PC15 5
PL9
7
4 .
0 . 2 2u _1 6V_0 6
T MPC0 60 3H-R6 8M-Z 01
4
1
2
PR21 8
9
.
5
6
7
8
C
5 .1_0 6
5
*
6
PQ45
PD21
PR12 8
PR12 9
.
6
4
*
MDS26 55
*CSOD1 40SH
*1 0m i l _s ho r t
*1 0m i l _s ho r t
6
6 .
2
3
1
PC15 8
V _
A
2 20 0p_ 50 V_ X7 R_0 4
5
2 .
u _
0
6
+
5
5 VS
1
6
1
C
P
PC163
2.2 u_6 .3V_Y5 V _06
ISP _0
I S N _ 0
P R 1 3 9
5 1 0 K _ 0 4
5 V
PR1 45
10 0K_0 4
P R 1 4 4
* 0 _ 0 4
2 7
VCORE_ON
Z 33 01
G
1
P R 1 4 7
* 0 _ 0 4
D
3 0,3 3
S U S C
PJ1 6
PQ4 7
OPEN-1 mm
P R 2 0 9
0 _ 0 4
G
MTN7 00 2Z HS3
2
S
3.3 VS
PC17 1
U4 6
5
*0 .1u _10 V_X7 R_0 4
*74 AHC1 G08 GW
1
33
1 VS_ PW RGD
4
2
19 ,32
DDR1 .5V_PW RGD
3
E MI
VDDCR_ CPU
C78 9 0 .1u _10 V_X5R_0 4
C79 0 * 0.01 u_ 16V_ X7 R_04
C79 1 0 .1u _10 V_X5R_0 4
VIN
PC15 4
8
8
0
+
0
_
_
_
*1 5u _2 5V_6 .3*4 .4 _C
R
R
5
5
X
X
_
2
V _
3
_
5
5
1
1
V
5
5
C
2
C
2
_
P
u _
P
u _
CPU_VDDCR
VDDCR_ CPU
7
.
.
7
PJ 20
4 .
4
*
*
11A
1
2
*8mm
4
4
0
0
_
8
V _
0
R
7
_
5
X
A
R
Y
_
5
_
_
V
X
V
V
_
0
0
_
5
V
1
_
V
3
_
5
.
u
.
u
1
6
2
2
_
2
0
_
.
.
u
u
0
0
0
0
1
3
3
*
+
4
6
1
0
2
9
C
5
6
6
1
1
P
1
C
C
C
P
P
P
EN_ VCORE
PC17 2
D
PQ46
0.1 u_ 10 V_ X7 R_0 4
MT N700 2Z HS3
S
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