Assembly Options - Linear Technology DC2581A Demo Manual

DEMO MANUAL DC2581A

ASSEMBLY OPTIONS

Assembly
Version U1 Part Number
DC2581A-A LTC2341-18
DC2581A-B LTC2341-16
DC890 QUICK START PROCEDURE
Check to make sure that all jumpers are set to their default
settings as described in the DC2581A Jumpers section of
this manual. The default connections configure the ADC to
use the onboard reference and regulators to generate all
the required bias voltages. The analog inputs by default are
DC coupled. Connect the DC2581A to a DC890 USB High
Speed Data Collection Board using connector P1. Then,
connect the DC890 to a host PC with a standard USB A/B
cable. Apply ±9V to the indicated terminals. Then apply
a low jitter signal source to J5 and J6. Use J7 to route
the signal sources of J5 and J6 to the desired AIN0-AIN1
inputs. Observe the recommended input voltage range
for each analog input. Connect a low jitter 2.5V
wave or square wave to connector J1. See the Assembly
Options table for the appropriate clock frequency. Note
that J1 has a 50Ω termination resistor to ground.
DC590/DC2026 QUICK START PROCEDURE
IMPORTANT! To avoid damage to the DC2581A, make
sure that VCCIO (JP6 of the DC590, JP3 of the DC2026)
of the DC590/DC2026 is set to 3.3V before connecting
the DC590/DC2026 to the DC2581A.
To use the DC590/DC2026 with the DC2581A, it is necessary
to apply ±9V and ground to the ±9V and GND terminals of
the DC2581A. Connect the DC590/DC2026 to a host PC
with a standard USB A/B cable. Connect the DC2581A to
a DC590/DC2026 USB serial controller using the supplied
14-conductor ribbon cable. Apply a signal source to J5
2
Max Conversion Number of
Rate Channels
666ksps 2
666ksps 2
Run the PScope
later) which can be downloaded from
designtools/software.
Complete software documentation is available from the
Help menu. Updates can be downloaded from the Tools
menu. Check for updates periodically as new features
may be added.
The PScope software should recognize the DC2581A and
configure itself automatically.
Click the Collect button (See Figure 3) to begin acquiring
data. The Collect button then changes to Pause, which
sine
can be clicked to stop data acquisition.
P-P
and J6. Use J7 to route the signal sources of J5 and J6
to the desired AIN0-AIN1 inputs. No Clock is required on
J1 when using the DC590/DC2026. The clock signal is
provided by the DC590/DC2026.
Run the QuikEval software (quikeval.exe version K110 or
later) which is available from
software. The correct control panel will be loaded auto-
matically. Click the COLLECT button (Figure 6) to begin
reading the ADC.
Number of Max CLK IN
Bits Frequency
18 60MHz
16 60MHz
software (Pscope.exe version K91 or
™
www.linear.com/designtools/
CLK IN/fs
Ratio
90
90
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dc2581af